Logarithmic analog-to-digital converter

Claim 1

A logarithmic analog-to-digital converter comprising receiving means for receiving an analog signal, programmable amplifier means connected to the receiving means and responsive to digital signals for providing an analog signal, and corresponding to a received analog signal, said programmable amplifier means includes a plurality of amplifiers having a first amplifier and a last amplifier, each amplifier having an input, an output and a different predetermined fixed gain of unity or greater; and said first amplifier having its input connected to the receiving means; and a plurality of switching means, having a first switching means and a last switching means, each switching means having two inputs and one output and being controlled by a different digital signal from the digital signal means to pass a signal applied to one input from the one input to the output or to pass another signal applied to the other input from the other input to the output, the one input of each means being connected to the output of a corresponding amplifier and the other input of each switching means, except the first switching means, being connected to the output of a corresponding switching means, the other input of the first switching means being connected to the receiving means, and the output of the last switching means being connected to the digital signal means, so that all the switching means control the amplification of a received analog signal; and digital signal means connected to the programmable amplifier means for providing the digital signals to the programmable amplifier means and as digital outputs corresponding logarithmically to the received analog signal in accordance with the analog signal from the programmable amplifier means, said digital signal means includes a pulse generator providing a pulse signal when an end of conversion signal is at a low logic level and not providing pulses when the end of conversion signal is at a high logic level, a shift register connected to the pulse source and responsive to the pulse signal for providing a plurality of pulses occurring in sequence and providing the end of conversion signal at a low level while providing the pulses and providing the end of conversion signal at a high logic level upon the completion of a sequence, a comparator receiving the analog signal from the programmable amplifier means, switching means connected to the shift register, to the comparator and to ground and receiving a reference voltage for providing a ground connection to the comparator during the occurrence of a first pulse provided by the shift register during the sequence and providing the reference voltage to the comparator during the occurrence of the remaining pulses provided by the shift register, a plurality of flip-flop means, each flip-flop means being connected to the shift register for being responsive to a different pulse provided by the shift register and to the output from the comparator to provide a digital signal to a corresponding switching means in the programmable amplifier so that upon the completion of a sequence the plurality of flip-flop means provides digital signals corresponding logarithmically to the analog input signal.