US4101834A — Methods and apparatus for rejection of interferen…

Claim 1

Independent Claim 143 words

A method for minimizing interference to a data carrier in a data communications system having a potentially-interfering signal system-wide signal at a known frequency (f S ) and harmonics of said system-wide signal, comprising the steps of: (a) generating said data carrier at a frequency (f C )substantially midway between an adjacent pair of the N-th and the N+1-st harmonics of said system-wide single signal; and (b) locking the frequency (f C ) of said data carrier to an odd multiple (2N+1) of the first subharmonic (f S/2 ) of the known frequency (f S ) of said single system-wide signal such that f C =(2N+1)(f S /2), where N is an integer greater than zero, to maintain the frequency of said data carrier with essentially equal frequency seapration from each of said adjacent pair of harmonics even if said known frequency varies.

Claim 2

Independent Claim 143 words

A method for minimizing interference to a data carrier in a data communications system having a potentially-interfering signal system-wide signal at a known frequency (f S ) and harmonics of said system-wide signal, comprising the steps of: (a) generating said data carrier at a frequency (f C )substantially midway between an adjacent pair of the N-th and the N+1-st harmonics of said system-wide single signal; and (b) locking the frequency (f C ) of said data carrier to an odd multiple (2N+1) of the first subharmonic (f S/2 ) of the known frequency (f S ) of said single system-wide signal such that f C =(2N+1)(f S /2), where N is an integer greater than zero, to maintain the frequency of said data carrier with essentially equal frequency seapration from each of said adjacent pair of harmonics even if said known frequency varies.

Claim 3

Dependent Claim 175 words

A method as set forth in claim 1, wherein said system further includes at least one other data carrier, said method further comprising the steps of: (c) generating each of said at least one other data carriers at a frequency (f C ') substantially mid-way between each of at least one other pair of harmonics of said known frequency and differing from the pair of harmonics adjacent to said data carrier; and (d) locking the frequency (f C ') of each of said at least one other data carriers to a different odd multiple (2N'+1) of said first subharmonic of said known frequency such that each frequency f C =(2N'+1) (f S /2), where N' is another integer greater than zero and different for each of said at least one other data carrier and differing from N for said data carrier, to maintain essentially equal frequency separation between each of said at least one other data carriers and each of the associated pair of harmonics of said known frequency even if said known frequency varies.

Claim 4

Dependent Claim 101 words

A method as set forth in claim 2, wherein step (d) comprises the steps of: dividing said known frequency by a factor of two to obtain a first subharmonic; dividing the frequency of each data carrier by a factor of (2n+1) to obtain a divided carrier frequency, where n is the number of the lower frequency harmonic adjacent to the data carrier frequency (f c ,n) comparing said first subharmonic and each divided carrier frequency to derive a frequency error for each data carrier; and adjusting the frequency of each data carrier to reduce the frequency error thereof essentially to zero.

Claim 5

Independent Claim 268 words

A method for minimizing interference in a data communications system having a data carrier, at least one other data carrier, and a potentially-interfering system-wide signal at a known frequency, each of said data carrier and said at least one other data carrier simultaneously carrying an associated data sequence, said method comprising the steps of: (a) generating said data carrier at a frequency substantially midway between an adjacent pair of harmonics of said system-wide signal; (b) locking the frequency of said data carrier to the known frequency of said system-wide signal to maintain the frequency of said data carrier with essentially equal frequency separation from each of said adjacent pair of harmonics, even if said known frequency varies; (c) generating each of said at least one other data carriers at a frequency substantially midway between each of at least one other pair of harmonics of said known frequency and differing from the pair of harmonics adjacent to said data carrier; (d) locking the frequency of each of said at least one other data carriers to said known frequency to maintain essentially frequency separation between each of said at least one other data carriers and each of the associated pair of harmonics of said known frequency, even if said known frequency varies; (e) digitizing each data sequence; (f) modulating each of said data carrier and said at least one other data carrier in accordance with the associated digitized data sequence; and (g) selecting the modulation characteristics to position a null of the modulation envelope of each modulated data carrier at the carrier frequencies of all of the remaining data carriers.

Claim 6

Independent Claim 268 words

A method for minimizing interference in a data communications system having a data carrier, at least one other data carrier, and a potentially-interfering system-wide signal at a known frequency, each of said data carrier and said at least one other data carrier simultaneously carrying an associated data sequence, said method comprising the steps of: (a) generating said data carrier at a frequency substantially midway between an adjacent pair of harmonics of said system-wide signal; (b) locking the frequency of said data carrier to the known frequency of said system-wide signal to maintain the frequency of said data carrier with essentially equal frequency separation from each of said adjacent pair of harmonics, even if said known frequency varies; (c) generating each of said at least one other data carriers at a frequency substantially midway between each of at least one other pair of harmonics of said known frequency and differing from the pair of harmonics adjacent to said data carrier; (d) locking the frequency of each of said at least one other data carriers to said known frequency to maintain essentially frequency separation between each of said at least one other data carriers and each of the associated pair of harmonics of said known frequency, even if said known frequency varies; (e) digitizing each data sequence; (f) modulating each of said data carrier and said at least one other data carrier in accordance with the associated digitized data sequence; and (g) selecting the modulation characteristics to position a null of the modulation envelope of each modulated data carrier at the carrier frequencies of all of the remaining data carriers.

Claim 7

Dependent Claim 69 words

A method as set forth in claim 4, wherein step (g) comprises the step of generating at least one baud, each baud being essentially equal to an exact submultiple of said known frequency; and step (f) further comprises the step of advancing sequential bits of the digitized data sequence at one of said at least one baud to establish a modulation input for means modulating the associated data carrier.

Claim 8

Dependent Claim 21 words

A method as set forth in claim 5, further comprising the step of modulating each data carrier at an identical baud.

Claim 9

Dependent Claim 37 words

A method as set forth in claim 5, further comprising the step of modulating at least one of the data carriers at a baud differing from the baud utilized in modulating the remainder of said data carriers.

Claim 10

Dependent Claim 26 words

A method as set forth in claim 5, further comprising the step of establishing the baud equal to an even integral submultiple of said known frequency.

Claim 11

Dependent Claim 92 words

A method as set forth in claim 5, further comprising the steps of: (h) receiving a selected one of said modulated data carriers at a receiving end; (i) providing a baud clock at said receiving end; (j) synchronizing the frequency of said baud clock to said known frequency; and (k) demodulating said selected modulated data carrier responsive to each of a plurality of successive baud time periods, each equal to a preselected number of cycles of the frequency of said baud clock, to recover the successive values of said digitized data sequence.

Claim 12

Dependent Claim 63 words

A method as set forth in claim 9 wherein step (k) comprises the steps of: providing main data detector means at said receiving end for demulating the selected modulated data carriers; and initializing said main detector means to preselected initial conditions after each baud time period responsive to the synchronized baud clock to independently detect each baud of said selected modulated data carrier.

Claim 13

Dependent Claim 48 words

A method as set forth in claim 10, wherein said demodulating means comprises at least one integrating means and said initializing step further comprises the step of discharging said integrating means to said preselected initial conditions at the conclusion of a preselected number of said baud time periods.

Claim 14

Dependent Claim 151 words

A method as set forth in claim 9, wherein step (f) further comprises the step of preferentially reversing the phase of each data carrier in accordance with the occurrence of a first value of the associated digitized data sequence and at an associated baud equal to said exact submultiple of said known frequency; and further comprising the steps of providing a pair of said integrating means; discharging alternating ones of said pair of integrating means at the beginning of alternating ones of said baud time periods; providing means for coupling said received data carrier to alternating ones of said pairs of integrating means associated alternating ones of said baud periods, each said integrating means maintaining an output thereof at a constant value while said received data carrier is coupled to the remaining integrating means; and multiplying the outputs of said pair of integrating means together to recover the digitized data sequence.

Claim 15

Dependent Claim 220 words

A digital communications system for the transmission of data in media having a potentially-interfering system-wide signal of known frequency, said system comprising: transmitting means including first means for generating a data carrier at a frequency essentially midway between a pair of adjacent harmonics of said known frequency; second means responsive to said known frequency for locking the frequency of said first means exactly midway between said pair of adjacent harmonics; third means for generating a baud essentially equal to an even integer submultiple (m) of said known frequency, where m is greater than 1; fourth means for storing a data sequence to be transmitted, said fourth means having an output at which sequential single bits of said data sequence are present responsive to sequential cycles of said baud; fifth means for varying an electrical parameter of said data carrier responsive to said sequential single bits at said output of said fourth means, said fifth means having an output coupled to the transmission media of said system; and receiving means comprising sixth means for acquiring said baud at the initiation of a data transmission of said data carrier; seventh means for coupling said sixth means to said media; and eighth means coupled to said seventh means for synchronously demodulating said data carrier responsive to the baud established by said sixth means.

Claim 16

Dependent Claim 220 words

A digital communications system for the transmission of data in media having a potentially-interfering system-wide signal of known frequency, said system comprising: transmitting means including first means for generating a data carrier at a frequency essentially midway between a pair of adjacent harmonics of said known frequency; second means responsive to said known frequency for locking the frequency of said first means exactly midway between said pair of adjacent harmonics; third means for generating a baud essentially equal to an even integer submultiple (m) of said known frequency, where m is greater than 1; fourth means for storing a data sequence to be transmitted, said fourth means having an output at which sequential single bits of said data sequence are present responsive to sequential cycles of said baud; fifth means for varying an electrical parameter of said data carrier responsive to said sequential single bits at said output of said fourth means, said fifth means having an output coupled to the transmission media of said system; and receiving means comprising sixth means for acquiring said baud at the initiation of a data transmission of said data carrier; seventh means for coupling said sixth means to said media; and eighth means coupled to said seventh means for synchronously demodulating said data carrier responsive to the baud established by said sixth means.

Claim 17

Dependent Claim 129 words

A system as set forth in claim 13, wherein said first means comprises a voltage controlled oscillator having an output frequency substantially proportional to the magnitude of an input voltage; and said second means comprises first divider means for dividing said known frequency by a factor of two; second divider means for dividing the frequency of said first means by a factor of (2n+1), where n is an integer greater than one; and means coupled to said first and second divider means for comparing the pair of divided frequencies to derive a voltage having an amplitude substantially proportional to the frequency error between the pair of divided frequencies, said derived voltage being applied as said input voltage of said first means to reduce said frequency error essentially to zero.

Claim 18

Dependent Claim 53 words

A system as set forth in claim 13, wherein said third means comprises a frequency counter having an input and an output, said input receiving said known frequency, said output being alternatively enabled to one of first and second states during counting of each sequential group of m cycles of said known frequency.

Claim 19

Dependent Claim 93 words

A system as set forth in claim 13, wherein said sixth means comprises means for integrating a received data carrier; means for generating a sampling frequency; means for sampling the integrated receive data carrier at said sampling frequency; means for detecting a change in the magnitude of said electrical parameter for sequential samples of said received data carrier; means for generating a multiple of said known frequency; and means enabled by said detecting means for dividing said multiple of said known frequency by a preselected number to generate a waveform having said baud.

Claim 20

Dependent Claim 34 words

A system as set forth in claim 16, wherein said detecting means is adapted to detect a change in polarity of the slope of said integrated received data carrier to enable said dividing means.

Claim 21

Dependent Claim 172 words

A system as set forth in claim 16, wherein the electrical parameter varied by said fifth means is the phase of said data carrier; said eighth means comprising: first and second integrator means each having an input and an output; means associated with each of said first and second integrator means for indenpendently establishing initial conditions of each integrator output responsive to different ones of the odd-numbered and even-numbered pulses of the waveform generated by said sixth means; switch means for alternatively coupling said seventh means to the input of one of said first and second integrator means at said baud; the output of each integrating means being adapted to be held constant at a value established thereat immediately prior to the remaining one of said integrator means receiving the associated initial-condition-establishing pulse and until recept of next subsequent pulse thereafter; and means for multiplying together the outputs of said first and second integrator means to derive a signal indicative of the phase of the data carrier received at said receiving means.

Claim 22

Dependent Claim 49 words

A system as set forth in claim 18, further comprising means for sampling the output of said multiplying means immediately prior to the receipt of each waveform edge and for storing the value of the sampled output to establish the value of each sequential bit of said data sequence.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	1981-07-17	1982-01-16	1982-07-18	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	1985-07-17	1986-01-16	1986-07-18	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	1989-07-17	1990-01-16	1990-07-18	$7700.00	Window Closed / Lapsed

Methods and apparatus for rejection of interference in a digital communications system

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