Fabrication of mesa devices by MBE growth over channeled substrates

Claim 2

A process for fabricating mesa geometry semiconductor devices comprising the steps of: forming in a semiconductor body a plurality of channels separated by ridges such that each channel is narrower at its top than at its base, and directing a molecular beam substantially perpendicular to said body so that epitaxial layers grow simultaneously on said ridges and in said channels, the layers on the ridges being physically separate from those in the channels.

Claim 3

The process according to claim 1 wherein said forming step results in channels having substantially trapezoidal cross sections.

Claim 4

The process according to claim 2 wherein said forming step includes masking said body in the regions where said ridges are to be formed, and exposing the unmasked portions of said body to a preferential etchant to form said channels.

Claim 5

The process of claim 3 wherein said body is an (001) oriented Group III(a)-V(a) compound material, said channels and ridges extend along a direction and said etchant comprises H 2 SO 4 :H 2 O 2 :H 2 O.

Claim 6

The process of claim 4 wherein said directing step is effective to form double heterostructures on said ridges.

Claim 7

The process of claim 5 including the additional steps of forming a native oxide on said heterostructures, opening contact windows in said oxide, and electroplating metal contacts into the windows.

Claim 8

The process of claim 1 including the step of directing a metal vapor at substantially normal incidence to said body, thereby to form a metal layer on the top of the uppermost epitaxial layer on said ridges and physically separate therefrom a metal layer on the epitaxial layers in said channels.

Claim 9

A process for fabricating stripe geometry mesa double heterostructure junction lasers comprising the steps of: on an (001) oriented GaAs wafer forming a plurality of parallel, separated stripe masks which extend along the direction, exposing the unmasked portion of said wafer to a preferential etchant so as to form channels therein which are narrower at their top than at their base, removing the remaining mask material to expose underlying ridges separated by said channels, placing said wafer in an evacuable chamber, reducing the pressure in said chamber to a subatmospheric pressure, heating said wafer to a temperature suitable for epitaxial growth, directing a plurality of molecular beams substantially perpendicular to said body so that the following layers epitaxially grow simultaneously on said ridges and, physically separate thereform, in said channels: an Al y Ga 1-y R cladding layer of one conductivity type, where 0 < y < 1, and R includes at least As, an Al x Ga 1-x R active region, 0 < x < 0.4 and an Al z Ga 1-z R cladding layer of the opposite conductivity type, 0 < z < 1, y,z < x, and forming electrical contacts to said wafer and to said layers grown on said ridges.

Claim 10

A process for fabricating stripe geometry mesa double heterostructure junction lasers comprising the steps of: on an (001) oriented GaAs wafer forming a plurality of parallel, separated stripe masks which extend along the direction, exposing the unmasked portion of said wafer to a preferential etchant so as to form channels therein which are narrower at their top than at their base, removing the remaining mask material to expose underlying ridges separated by said channels, placing said wafer in an evacuable chamber, reducing the pressure in said chamber to a subatmospheric pressure, heating said wafer to a temperature suitable for epitaxial growth, directing a plurality of molecular beams substantially perpendicular to said body so that the following layers epitaxially grow simultaneously on said ridges and, physically separate thereform, in said channels: an Al y Ga 1-y R cladding layer of one conductivity type, where 0 < y < 1, and R includes at least As, an Al x Ga 1-x R active region, 0 < x < 0.4 and an Al z Ga 1-z R cladding layer of the opposite conductivity type, 0 < z < 1, y,z < x, and forming electrical contacts to said wafer and to said layers grown on said ridges.

Claim 11

The process of claim 8 wherein in said exposing step said etchant comprises H 2 SO 4 :H 2 O 2 :H 2 O.

Claim 12

The process of claim 9 wherein said contact forming step includes directing a metal vapor at substantially normal incidence to said body, thereby to form a metal layer on the top of the uppermost epitaxial layer on said ridges and physically separate therefrom a metal layer on the epitaxial layers in said channels.

Claim 13

The process of claim 9 wherein said contact forming step includes forming a native oxide on the uppermost epitaxial layer by anodization, opening contact windows in said oxide in registration with said ridges, and electroplating metal contacts into said windows.