US4099266A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Single-chip bi-polar sense amplifier for a data processing system using MOS memory
Assignee: EMC Corp
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Filing: 1977-02-25
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Granted: 1978-07-04
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Expires: 1997-02-25
Abstract
Abstract A single-chip memory-sense amplifier for a data processing system. There is disclosed a sense amplifier (level converter) and bus driver for use in a data processing system, to receive signal inputs from main memory and to drive a memory bus connecting output of the sense amplifier to the CPU. This sense amplifier is intended for use with memory fabricated from N-channel MOS technology. The circuitry of the sense amplifier is fabricated from bi-polar technology and formed on a single monolithic integrated circuit chip. The biasing scheme employed within the circuitry of the sense amplifier provides reliable operation, by making the amplifier relatively insensitive to power supply variations.
Inventors
- 👤 Clifford Biggers
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 00:47
CPC Classifications
G; G11; G11C; G11C7/00; G11C7/10; G11C7/1051; G11C7/1069; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C11/401; G11C11/4063; G11C11/407; G11C11/409; G11C11/4091; G11C7/06; G11C7/067
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
186 words
In a data processing system including a CPU for processing said data and a main memory connected from said CPU by a memory bus for storing at least said data, an integrated circuit semiconductor chip energized by a power supply and forming a sense amplifier for receiving a signal input from said memory and for providing an amplified signal output to said CPU via said bus, said sense amplifier comprising: constant current means for establishing reference levels which are identically influenced by variation of said power supply; input clamp means biased by one of said reference levels and responsive to said signal input for generating a clamped representation of said signal input; differential amplifier means biased by the other of said reference levels for receiving said clamped representation of said signal input and for providing intermediate amplification thereof; means for receiving a STROBE signal; and, gate means for combining said amplified representation of said signal input with said STROBE signal, and for providing said amplified signal output at the time of simultaneous occurrence of both said amplified representation of said signal input and said STROBE signal.
Claim 2
Dependent Claim
186 words
In a data processing system including a CPU for processing said data and a main memory connected from said CPU by a memory bus for storing at least said data, an integrated circuit semiconductor chip energized by a power supply and forming a sense amplifier for receiving a signal input from said memory and for providing an amplified signal output to said CPU via said bus, said sense amplifier comprising: constant current means for establishing reference levels which are identically influenced by variation of said power supply; input clamp means biased by one of said reference levels and responsive to said signal input for generating a clamped representation of said signal input; differential amplifier means biased by the other of said reference levels for receiving said clamped representation of said signal input and for providing intermediate amplification thereof; means for receiving a STROBE signal; and, gate means for combining said amplified representation of said signal input with said STROBE signal, and for providing said amplified signal output at the time of simultaneous occurrence of both said amplified representation of said signal input and said STROBE signal.
Claim 3
Dependent Claim
43 words
The sense amplifier recited in claim 1 and wherein said constant current means includes: means for establishing a constant current source biasing voltage; and, a matched transistor pair connected from said supply and biased by said voltage for generating substantially equal constant currents.
Claim 4
Dependent Claim
60 words
The sense amplifier recited in claim 2 and wherein said differential amplifier means comprises two differential amplifiers, the output of the first of said differential amplifiers providing the input to the second of said differential amplifiers, said first differential amplifier including cascode transistor means for collector clamping to control said input to said second differential amplifier within a specified range.
Claim 5
Dependent Claim
21 words
The sense amplifier of claim 3 and wherein said gate means includes means for driving said bus with said amplified signal.
Claim 6
Dependent Claim
24 words
The sense amplifier of claim 4 and wherein said memory is constructed from MOS integrated circuits and said amplifier is a bi-polar integrated circuit.
References Cited (Backward Citations)
US3648071A
Cited
US4056740A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1981-07-03 | 1982-01-02 | 1982-07-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1985-07-03 | 1986-01-02 | 1986-07-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1989-07-03 | 1990-01-02 | 1990-07-04 | $7700.00 | Window Closed / Lapsed |