High level control processor

Claim 2

In a programmed digital computer, apparatus for loading a program into a memory in a manner to be location independent so that each segment of the program may be selectively accessed for modification or debugging without affecting the balance of the program, wherein each given program segment is identified by a program segment label comprised of a group of coded digital signals which precedes a plurality of instructions that follow said label and that comprise a program segment, comprising a program memory, a source of a plurality of program segments each including a program segment label followed by a plurality of instructions, means for sequentially transferring said plurality of program segments into and out of said program memory, a program counter means for counting storage addresses used in providing to said program memory the addresses for storage and for read out of program labels and instructions from said program memory, a label memory means, wherein each label memory address is represented by a program segment label, label detecting means for detecting when a program segment label has been transferred by said means for transferring said plurality of program segments, control means, responsive to a label being detected by said label detecting means, for loading in said program counter the address at which the first instruction after said detected program label is stored in said program memory, and for addressing said label memory means with the detected program segment label, and means responsive to said label detecting means and said control means for storing said loaded address in said label memory means at an address represented by said detected program segment label, whereby a program segment can be selectively read out for modification or debugging by addressing said label memory means with a programmed segment label to obtain the address in said program memory of the first instruction of the program segment.

Claim 3

Apparatus as recited in claim 1 wherein said label detecting means detects said label as it is being transferred into said program memory.

Claim 4

Apparatus as recited in claim 1 wherein there is included sequence means for actuating both said program memory and said program counter means for successively reading out the contents of said program memory from addresses successively provided by said program counter means, and said label detecting means detects said label as it is being read out of said program memory means,

Claim 5

Apparatus as recited in claim 1 wherein an identifying label is associated with one of said instructions, designated as DO, which specifies that several of the immediately following instructions should be executed until the occurrence of an instruction designated as ENDO, when a return should be made to the instruction immediately following the DO instruction for reexecution of said immediately following instructions, and this procedure should be followed until an UNDO instruction is received, at which time the DO instruction procedure is terminated and the next instruction to be executed is the one immediately following the ENDO instruction, said apparatus comprising first means for detecting a DO instruction and its associated label when it is read out of said program memory during operation of said sequencing means, a label stack memory means, means responsive to a DO detection by said first detecting means for actuating said label stack memory means to store said DO label, first means for detecting an ENDO instruction during operation of said sequencing means, means responsive to a detection of ENDO for incrementing the address in the program counter means to represent the address in the program memory of the first instruction following the ENDO instruction, means responsive to said detection of ENDO for actuating said label stack memory means to read out and apply said DO label as an address to said label memory means, and means responsive to said detection of ENDO, to activate said label memory means to store, at a location represented by said DO label, the address set forth in said program counter means.

Claim 6

Apparatus as recited in claim 4 including means operative when said program memory is not being loaded or scanned and said computer is in an instruction execution mode, said means comprising second means for detecting a DO instruction and its associated label read out of said program memory when said computer is in an instruction execution mode, means responsive to said DO detection by said second means for incrementing the program counter means to provide the address of the first instruction after said DO instruction, stack pointer counter means, means, responsive to said DO detection by said second means, for incrementing the count on said stack pointer counter means to represent an address in said label memory means, means responsive to said DO detection by said second means, to actuate said label memory means to write the address in said program counter means at a location in said label memory means specified by the address in said stack pointer counter means, means responsive to said DO detection by said second means for actuating said label stack memory to store said DO label, second means for detecting when an ENDO instruction is read out of said program memory, means responsive to said ENDO detection by said second means, for actuating said stack pointer counter means to apply its address to said label memory means and to enable said label memory means to transfer into said program counter means the address stored at the location specified by the address received from said stack pointer means, means for detecting when an UNDO instruction is read out of said program memory, means responsive to detection of UNDO for reading said DO label out of said label stack memory and applying it as an address to said label memory means, and means responsive to said UNDO detection for actuating said label memory means to transfer into said program counter means the address of the instruction following ENDO which is stored in said label memory means at an address represented by the label of said DO instruction.

Claim 7

Apparatus, as recited in claim 1, wherein one of said instructions, designated as IF, has a label associated therewith and has a condition associated therewith, and is followed by a sequence of instructions which are to be executed only if the associated condition is met, and immediately following the sequence is an instruction designated as ENDIF, and if the associated condition is not met then the computer is to skip all instructions between IF and ENDIF and commence operations with the first instruction after ENDIF, said apparatus comprising first means for detecting an IF instruction and its associated label when it is read out of said program memory during operation of said sequencing means, a label stack memory means, means responsive to said IF label being detected by said first means for detecting an IF label for actuating said label stack memory means to store said IF label, second means for detecting an ENDIF instruction when it is read out of said program memory, means responsive to detection of said ENDIF instruction by said second means for detecting an ENDIF instruction for incrementing said program counter means to represent the address in the program memory of the first instruction following the ENDIF instruction for actuating said label stack memory means to read out and apply said IF label as an address to said label memory means, and, means responsive to detection of said ENDIF instruction by said second means for detecting and ENDIF to activate said label memory means to store at a location represented by said IF label, the address set forth in said program counter means.

Claim 8

Apparatus as recited in claim 6 including means operative when said program memory is not being scanned or loaded by said means for sequencing and said computer is in an instruction execution mode, said means comprising means for activating said program memory to read instructions stored therein from addresses provided by said program counter, means activated when an IF instruction and its associated label is read out of said program memory, for detecting the condition associated with said IF instruction, means for comparing the condition of data in said computer with the detected condition and producing a first output when they are identical and a second output when they are not identical, means for activating said label stack to store said IF label and said first and second output, means responsive to said first output to enable said computer to execute the instructions read out of said program memory between IF and ENDIF, and means responsive to said second output to prevent said computer from executing any instructions stored in said program memory following said IF instruction until the instruction following the ENDIF label is read from said program memory.

Claim 9

Apparatus as recited in claim 1, wherein said computer is in an execute instruction mode and there is stored in said program memory an IF instruction and its associated label, and an associated condition followed by a first sequence of instructions, followed by an ELSEIF instruction followed by a second sequence of instructions, followed by an ELSE instruction, followed by a third sequence of instructions followed by an ENDIF instruction, wherein said ELSEIF has associated an alternative condition to the one associated with the IF label and said ELSE instruction immediately procedes the location of the first of the instructions which the computer should execute in the event that the conditions associated with IF and ELSEIF are not met, said apparatus comprising means for activating said program memory to read instructions stored therein from addresses provided by said program counter, means activated when an IF instruction and its associated label is read out of said program memory for detecting the condition associated with said IF instruction, a label stack memory means, means for activating said label memory means to store said IF label and the condition of data in said computer at the time said IF instruction is read out of said program memory, means for comparing said condition of data stored in said label stack memory means with the condition associated with said IF instruction and producing a first output when they are identical and a second output when they are not identical, means responsive to said first output to enable said computer to execute the instructions read out of said program memory between said IF instruction and said ELSEIF instruction, means, responsive to said ELSEIF being read out of said program memory, when said computer has executed said first sequence of instructions to read said IF label out of said label stack memory means and to apply it as an address to said label memory means, means responsive to the application of the IF label as an address to said label memory means, to read into said program counter means the address stored therein whereby the next instruction read from said program memory means is the one following ENDIF, means responsive to said second output to prevent said computer from executing any instructions until the ELSEIF Instruction and associated condition is read from said program memory, means activated when an ELSEIF instruction and associated condition is read from said program memory to compare the condition of data stored in said label stack memory means with the condition associated with said ELSEIF and producing a third output when they are identical and a fourth output when they are not identical, means responsive to said third output to enable said computer to execute instructions read out from said program memory between ELSEIF and ELSE, means responsive to the read out of ELSE from said program memory when said computer has executed the instructions immediately proceeding it for reading said IF label out of said label stack memory means and applying it as an address to said label memory means, means responsive to said label memory means being addressed by said IF label to enable said label memory means to read into said program counter means the address stored therein whereby the next instruction read out of said program memory means is the one following ENDIF, means responsive to said fourth output to prevent said computer from executing any instructions read from said program counter until an ELSE instruction is read from said program counter, and means responsive to said ELSE instruction, when said computer has not executed the instructions immediately proceeding it, to enable said computer to execute instructions read from said program memory means between said ELSE and said ENDIF.

Claim 10

Apparatus as recited in claim 1 wherein there are recorded in said program memory a number of different interrupt routine programs each having a label including a different priority code, the address of each interrupt routine program being recorded in said label table memory means under said label, said computer including means to generate interrupt signal representing a request for an interrupt routine program and including a signal representative of the priority of said requested interrupt routine program, the improvement comprising priority encoding means for generating a priority code, in response to receiving interrupt request signals, means for applying interrupt request signals from said computer to said priority encoding means, means for applying a priority code generated by said priority encoder as an address to said label table means, means responsive to the addressing of said label table means by said priority code to enable said label table to enter into said program counter the address of the interrupt routine program stored at the addressed location in said label table means whereby said program memory will next read out the interrupt routine program located at the address specified by the program counter means.

Claim 11

Apparatus for implementing the program structure of a computer as recited in claim 1 wherein there is included a source of data representative of human language identifiers of the plurality of program segments, text memory means for storing therein data representative of human language identifiers of the plurality of program segments stored in said program memory, text counter means for generating addresses for storing and for read out of said data from said text memory means, means for transferring said data to said text memory while loading said plurality of program segments into said program memory from said source of data. means for detecting a label, and text table means responsive to the detection of a label, for storing, at locations identified by the label for each program segment, the address generated by said text counter means, in said text table means, of the first character of said human language identifier of the program segment, identified by said label.