Delay circuit

Claim 2

A voltage controlled, active, variable delay circuit for voltage pulse waveforms comprising: control voltage source means; a cascaded chain of N electronic inverters, with N being an even integer, each inverter having a control input connected to the control voltage source means and a signal input for receiving voltage pulses to be delayed, each electronic inverter having a pulse propagation delay time T which is a function of the level of the control voltage applied by the control voltage source means to the control input, to give a delay interval D = 2/N T between application of an input voltage pulse to the signal input of the first electronic inverter of the cascaded chain and generation of an output voltage pulse by the last electronic inverter of the cascaded chain which is dependent upon the level of the control voltage; and a pulse shaping circuit connected to the last electronic inverter of the cascaded chain to shape the output voltage pulse received therefrom to substantially reproduce the input voltage pulse waveform.

Claim 3

A variable delay circuit as claimed in claim 1 in which the electronic inverters are open collector inverters.

Claim 4

A video signal time base corrector comprising: input means for receiving an uncorrected video signal including a video message portion and a synchronization portion; frequency modulation means connected to said input means for converting the uncorrected video input signal to a square wave pulse train having an instantaneous period dependent upon the instantaneous voltage level of the uncorrected video input signal; a voltage controlled active variable delay circuit having a signal input terminal and a control input terminal, said voltage controlled active variable delay circuit delaying the square wave pulse train applied thereto by a time interval dependent upon the instantaneous level of voltage at said control input terminal; first coupling means coupling said frequency modulation means to said voltage controlled active variable delay circuit signal input terminal for applying the square wave pulse train thereto; frequency demodulator means connected to said voltage controlled active variable delay circuit for converting the delayed square wave to a time corrected video signal substantially reproducing the wave form of the uncorrected video signal; output means coupled to the frequency demodulator means for applying the time corrected video signal to a utilizing device; synchronization error detection means, having a first input to receive a reference synchronization signal and a second input coupled to the demodulator means for generating an error signal having a voltage level indicative of the time difference between the reference synchronization signal and the time corrected video signal synchronization portion; and second coupling means coupling the synchronization error detector means to the voltage controlled active variable delay circuit control input means for application thereto of the error signal.

Claim 5

A video signal time base corrector comprising: input means for receiving an uncorrected video signal including a video message portion and a synchronization portion; frequency modulation means connected to said input means for converting the uncorrected video input signal to a square wave pulse train having an instantaneous period dependent upon the instantaneous voltage level of the uncorrected video input signal; a voltage controlled active variable delay circuit having a signal input terminal and a control input terminal, said voltage controlled active variable delay circuit delaying the square wave pulse train applied thereto by a time interval dependent upon the instantaneous level of voltage at said control input terminal; first coupling means coupling said frequency modulation means to said voltage controlled active variable delay circuit signal input terminal for applying the square wave pulse train thereto; frequency demodulator means connected to said voltage controlled active variable delay circuit for converting the delayed square wave to a time corrected video signal substantially reproducing the wave form of the uncorrected video signal; output means coupled to the frequency demodulator means for applying the time corrected video signal to a utilizing device; synchronization error detection means, having a first input to receive a reference synchronization signal and a second input coupled to the demodulator means for generating an error signal having a voltage level indicative of the time difference between the reference synchronization signal and the time corrected video signal synchronization portion; and second coupling means coupling the synchronization error detector means to the voltage controlled active variable delay circuit control input means for application thereto of the error signal.

Claim 6

A time base corrector as claimed in claim 3 in which said voltage controlled active variable delay circuit comprises: a cascaded chain of electronic inverters, each having a control input connected to said control input terminal and a signal input for receiving voltage pulses to be delayed, the signal input of the first electronic inverter of said cascaded chain of electronic inverters connected to said signal input terminal to receive a square wave pulse train therefrom, each electronic inverter having a propagation delay time to give a delay interval between application of an input voltage pulse to the signal input of said first electronic inverter of said cascaded chain and generation of an output voltage pulse by the last electronic inverter of said cascaded chain, with the pulse propagation delay time of the electronic inverters a function of the control voltage applied to the control inputs of the electronic inverters in the cascaded chain; and a pulse shaping circuit connected to the last electronic inverter of the cascaded chain to shape the output voltage pulse received therefrom to substantially reproduce the square wave pulse train waveform.

Claim 7

A time base corrector as claimed in claim 3 in which said first coupling means comprises: comparison means connected to said synchronization error detection means for generating a comparison signal indicative of a time difference between the reference synchronization signal and the time corrected video signal synchronization portion which time difference is greater than can be corrected by the voltage controlled active variable delay device; incremental delay means for delaying the square wave pulse train by any one of a plurality of incremental amounts; and control means responsive to comparison signals for activating said incremental delay means to delay the square wave pulse train by a time increment of which the comparison signal is indicative.

Claim 8

A time base corrector as claimed in claim 5 in which said incremental delay means includes a cascaded chain of electronic inverters.

Claim 9

A voltage controlled, active, variable delay circuit for voltage pulse waveforms comprising: voltage source means; a cascaded chain of N electronic inverters, with N being an even integer, each inverter having a control input connected to the control voltage source means and a signal input for receiving voltage pulses to be delayed, each electronic inverter having a pulse propagation delay time T which is a function of the level of the control voltage applied by the control voltage source means to the control input, to give a delay interval D = 2/N T between application of an input voltage pulse to the signal input of the first electronic inverter of the cascaded chain and generation of an output voltage pulse by the last electronic inverter of the cascaded chain which is dependent upon the level of the control voltage; and a pulse shaping circuit connected to the last electronic inverter of the cascaded chain to shape the output voltage pulse received therefrom.

Claim 10

A voltage controlled, active, variable delay circuit for voltage pulse waveforms comprising: voltage source means; a cascaded chain of N electronic inverters, with N being an even integer, each inverter having a control input connected to the control voltage source means and a signal input for receiving voltage pulses to be delayed, each electronic inverter having a pulse propagation delay time T which is a function of the level of the control voltage applied by the control voltage source means to the control input, to give a delay interval D = 2/N T between application of an input voltage pulse to the signal input of the first electronic inverter of the cascaded chain and generation of an output voltage pulse by the last electronic inverter of the cascaded chain which is dependent upon the level of the control voltage; and a pulse shaping circuit connected to the last electronic inverter of the cascaded chain to shape the output voltage pulse received therefrom.

Claim 11

A voltage controlled, active, variable delay circuit for voltage pulse waveforms comprising: control voltage source means; and a cascaded chain of N electronic inverters, with N being an even integer, each inverter having a control input connected to the control voltage source means and a signal input for receiving voltage pulses to be delayed, each electronic inverter having a pulse propagation delay time T which is a function of the level of the control input, to give a delay interval D = 2/N T between application of an input voltage pulse to the signal input of the first electronic inverter of the cascaded chain and generation of an output voltage pulse by the last electronic inverter of the cascaded chain which is dependent upon the level of the control voltage.

Claim 12

A voltage controlled, active, variable delay circuit for voltage pulse waveforms comprising: control voltage source means; and a cascaded chain of N electronic inverters, with N being an even integer, each inverter having a control input connected to the control voltage source means and a signal input for receiving voltage pulses to be delayed, each electronic inverter having a pulse propagation delay time T which is a function of the level of the control input, to give a delay interval D = 2/N T between application of an input voltage pulse to the signal input of the first electronic inverter of the cascaded chain and generation of an output voltage pulse by the last electronic inverter of the cascaded chain which is dependent upon the level of the control voltage.

Claim 13

A voltage controlled, active, variable delay circuit for voltage pulse waveforms comprising: control voltage source means; a cascaded chain of electronic inverters, each having a control input connected to the control voltage source means and a signal input for receiving voltage pulses to be delayed, each electronic inverter having a pulse propagation delay time which is a function of the level of the control voltage applied by the control voltage source means to the control input, to give a delay interval between application of an input voltage pulse to the signal input of the first electronic inverter of the cascaded chain and generation of an output voltage pulse by the last electronic inverter of the cascaded chain which is dependent upon the level of the control voltage; and a pulse shaping circuit including an electronic inverter having a control input for connection to a source of control voltage, a signal input connected to the last electronic inverter of the cascaded chain for receiving and shaping the output voltage pulses therefrom, and an output; and gating means having a first input connected to the last electronic inverter of the cascaded chain for receiving the voltage pulses to be shaped and a second input connected to said pulse shaping circuit electronic inverter output, said gating means providing an output pulse in the absence of an input pulse at each of the two gating means inputs to substantially reproduce the input voltage pulse waveform.

Claim 14

A voltage controlled, active, variable delay circuit for voltage pulse waveforms comprising: control voltage source means; a cascaded chain of electronic inverters, each having a control input connected to the control voltage source means and a signal input for receiving voltage pulses to be delayed, each electronic inverter having a pulse propagation delay time which is a function of the level of the control voltage applied by the control voltage source means to the control input, to give a delay interval between application of an input voltage pulse to the signal input of the first electronic inverter of the cascaded chain and generation of an output voltage pulse by the last electronic inverter of the cascaded chain which is dependent upon the level of the control voltage; and a pulse shaping circuit including an electronic inverter having a control input for connection to a source of control voltage, a signal input connected to the last electronic inverter of the cascaded chain for receiving and shaping the output voltage pulses therefrom, and an output; and gating means having a first input connected to the last electronic inverter of the cascaded chain for receiving the voltage pulses to be shaped and a second input connected to said pulse shaping circuit electronic inverter output, said gating means providing an output pulse in the absence of an input pulse at each of the two gating means inputs to substantially reproduce the input voltage pulse waveform.

Claim 15

A voltage controlled, active, variable delay circuit for voltage pulse waveforms comprising: control voltage source means; a cascaded chain of electronic inverters, each having a control input connected to the control voltage source means and a signal input for receiving voltage pulses to be delayed, each electronic inverter having a pulse propagation delay time which is a function of the level of the control voltage applied by the control voltage source means to the control input, to give a delay interval between application of an input voltage pulse to the signal input of the first electronic inverter of the cascaded chain and generation of an output voltage pulse by the last electronic inverter of the cascaded chain which is dependent upon the level of the control voltage; and a pulse shaping circuit for shaping the output voltage pulse received therefrom to substantially reproduce the input voltage pulse waveform, said pulse shaping circuit comprising a cascaded pair of electronic inverters, each having a control input for connection to a source of voltage, a signal input, and an output, the signal input of the first of said cascaded pair of electronic inverters connected to the last electronic inverter of the cascaded chain for receiving voltage pulses to be shaped; a further electronic inverter having a signal input and an output and connected to shunt said cascaded pair of electronic inverters and having a control input for connection to a source of voltage; and a pull-up resistor for coupling the junction of the output of said further electronic inverter and the output of the second of the cascaded pair of electronic inverters to a voltage source.

Claim 16

A voltage controlled, active, variable delay circuit for voltage pulse waveforms comprising: control voltage source means; a cascaded chain of electronic inverters, each having a control input connected to the control voltage source means and a signal input for receiving voltage pulses to be delayed, each electronic inverter having a pulse propagation delay time which is a function of the level of the control voltage applied by the control voltage source means to the control input, to give a delay interval between application of an input voltage pulse to the signal input of the first electronic inverter of the cascaded chain and generation of an output voltage pulse by the last electronic inverter of the cascaded chain which is dependent upon the level of the control voltage; and a pulse shaping circuit for shaping the output voltage pulse received therefrom to substantially reproduce the input voltage pulse waveform, said pulse shaping circuit comprising a cascaded pair of electronic inverters, each having a control input for connection to a source of voltage, a signal input, and an output, the signal input of the first of said cascaded pair of electronic inverters connected to the last electronic inverter of the cascaded chain for receiving voltage pulses to be shaped; a further electronic inverter having a signal input and an output and connected to shunt said cascaded pair of electronic inverters and having a control input for connection to a source of voltage; and a pull-up resistor for coupling the junction of the output of said further electronic inverter and the output of the second of the cascaded pair of electronic inverters to a voltage source.

Claim 17

A voltage controlled, active, variable delay circuit for voltage pulse waveforms comprising: control voltage source means; a cascaded chain of open collector electronic inverters, each having a control input connected to the control voltage source means and a signal input for receiving voltage pulses to be delayed, each electronic inverter having a pulse propagaton delay time which is a function of the level of the control voltage applied by the control voltage source means to the control input, to give a delay interval between application of an input voltage pulse to the signal input of the first electronic inverter of the cascaded chain and generation of an output voltage pulse by the last electronic inverter of the cascaded chain which is dependent upon the level of the control voltage; and a pulse shaping circuit connected to the last electronic inverter of the cascaded chain to shape the output voltage pulse received therefrom.

Claim 18

A voltage controlled, active, variable delay circuit for voltage pulse waveforms comprising: control voltage source means; a cascaded chain of open collector electronic inverters, each having a control input connected to the control voltage source means and a signal input for receiving voltage pulses to be delayed, each electronic inverter having a pulse propagaton delay time which is a function of the level of the control voltage applied by the control voltage source means to the control input, to give a delay interval between application of an input voltage pulse to the signal input of the first electronic inverter of the cascaded chain and generation of an output voltage pulse by the last electronic inverter of the cascaded chain which is dependent upon the level of the control voltage; and a pulse shaping circuit connected to the last electronic inverter of the cascaded chain to shape the output voltage pulse received therefrom.