Phase locked loop circuit

Claim 1

In a phase locked loop circuit having a variable frequency oscillator, a reference signal oscillator, a phase comparator supplied with output signals of said variable frequency oscillator and said reference signal oscillator, respectively, and detecting a phase difference therebetween to provide a corresponding output signal and a low pass filter supplied with said output signal of the phase comparator to provide a corresponding DC voltage for controlling the variable frequency oscillator so as to phase-lock the phase of said variable frequency oscillator into the phase of said reference signal oscillator, the frequency of said variable frequency oscillator being varied manually in such a way that the frequency of said variable frequency oscillator equals an integral multiple of the frequency of said reference signal oscillator; means for detecting said DC voltage from the low pass filter, circuit means for generating a control signal when said DC voltage exceeds a predetermined value, with said control signal having a polarity different from the polarity of said DC voltage from said low pass filter and with the amplitude of said control signal being larger than that of said DC voltage, means for combining said DC voltage and said control signal to provide a combined output signal, and means for controlling the frequency and phase of said variable frequency oscillator in response to said combined output signal of said combining means in such a way that the frequency of said variable frequency oscillator is varied outside of the lock range of the phase locked loop and toward the capture range of the phase locked loop until the next succeeding phase locking state is obtained: said circuit means for generating the control signal including an input terminal connected to said low pass filter; first and second Schmitt trigger circuits each connected to said input terminal and supplied with said DC voltage therefrom so as to produce respective pulse control signals when the DC voltage exceeds said predetermined value in opposite polarities, respectively; first and second differentiating circuits connected to said first and second Schmitt trigger circuits and producing respective output signals; first and second inverting amplifiers for receiving the output signals from said first and second differentiating circuits and producing respective phase inverted output signals; third and fourth differentiating circuits connected to said first and second inverting amplifiers, respectively, and producing spike-like pulse signals at the front and back edges of the respective phase inverted output signals; and a transistor switching circuit supplied with said spike-like pulse signals from said third and fourth differentiating circuits so as to generate said control signal.