Patent US4093925A successfully refreshed from Google Patents.
US4093925A
Expired / Lapsed
US
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Method and system of driving power field effect transistor
Assignee: Nippon Gakki Co Ltd
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Filing: 1975-11-18
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Granted: 1978-06-06
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Expires: 1995-11-18
Abstract
Abstract A method and a system of obtaining a large power with the use of a junction field effect transistor by extending the working range to improve the utilization rate of the power source voltage. The range for the gate voltage is set up to some predetermined forward voltage at which the gate and the source will be subjected to a forward biasing. The source-to-drain internal resistance is reduced by this forward gate voltage, but no gate current is allowed to flow probably due to the existence of a non-linear element between the gate and the source.
Inventors
- 👤 Kenji Yokoyama
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 04:38
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/50; H03F3/505; H03F3/30; H03F3/3001; H03F3/3044
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
41 words
A method of driving a triode-like junction field effect transistor for increasing its maximum power output: comprising the step of over-driving said transistor by applying thereto a forward gate-to-source voltage which is greater in the forward biasing direction than zero volts.
Claim 2
Independent Claim
41 words
A method of driving a triode-like junction field effect transistor for increasing its maximum power output: comprising the step of over-driving said transistor by applying thereto a forward gate-to-source voltage which is greater in the forward biasing direction than zero volts.
Claim 3
Independent Claim
71 words
A method of driving a triode-like junction field effect transistor for increasing its maximum power output: comprising the step of over-driving said transistor by applying thereto a forward gate-to-source voltage which is greater in the forward biasing direction than zero volts, and in which said forward gate-to-source voltage is set at a value at which substantially no gate current is allowed to flow but beyond which the gate current increases rapidly.
Claim 4
Independent Claim
71 words
A method of driving a triode-like junction field effect transistor for increasing its maximum power output: comprising the step of over-driving said transistor by applying thereto a forward gate-to-source voltage which is greater in the forward biasing direction than zero volts, and in which said forward gate-to-source voltage is set at a value at which substantially no gate current is allowed to flow but beyond which the gate current increases rapidly.
Claim 5
Independent Claim
72 words
A method of driving a junction field effect transistor for increasing its maximum power output: comprising the step of over-driving said transistor by applying thereto a forward gate-to-source voltage which is greater in the forward biasing direction than zero volts, and in which said forward gate-to-source voltage is generated by the use of the gate-to-source voltage of a preceding field effect transistor, the two field effect transistors being connected in source-follower connection.
Claim 6
Independent Claim
72 words
A method of driving a junction field effect transistor for increasing its maximum power output: comprising the step of over-driving said transistor by applying thereto a forward gate-to-source voltage which is greater in the forward biasing direction than zero volts, and in which said forward gate-to-source voltage is generated by the use of the gate-to-source voltage of a preceding field effect transistor, the two field effect transistors being connected in source-follower connection.
Claim 7
Independent Claim
73 words
A method of driving a junction field effect transistor for increasing its maximum power output: comprising the step of over-driving said transistor by applying thereto a forward gate-to-source voltage which is greater in the forward biasing direction than zero volts, and in which said forward gate-to-source voltage is generated by the use of the base-to-emitter voltage of a preceding transistor, said field effect transistor being connected in emitter-follower connection with said preceding transistor.
Claim 8
Independent Claim
73 words
A method of driving a junction field effect transistor for increasing its maximum power output: comprising the step of over-driving said transistor by applying thereto a forward gate-to-source voltage which is greater in the forward biasing direction than zero volts, and in which said forward gate-to-source voltage is generated by the use of the base-to-emitter voltage of a preceding transistor, said field effect transistor being connected in emitter-follower connection with said preceding transistor.
Claim 9
Independent Claim
101 words
A system of driving a junction field effect transistor for increasing its maximum power output; comprising a junction field effect transistor having a gate, source and drain for deriving power, a signal source of a predetermined maximum signal swing level, and circuit means for connecting said signal source across the gate and source of said junction field effect transistor, said circuit means having circuit parameters so selected that at least at the maximum input signal swing level said transistor is over-driven because the gate-to-source voltage for said field effect transistor is then greater than zero volts in the forward biasing direction.
Claim 10
Independent Claim
101 words
A system of driving a junction field effect transistor for increasing its maximum power output; comprising a junction field effect transistor having a gate, source and drain for deriving power, a signal source of a predetermined maximum signal swing level, and circuit means for connecting said signal source across the gate and source of said junction field effect transistor, said circuit means having circuit parameters so selected that at least at the maximum input signal swing level said transistor is over-driven because the gate-to-source voltage for said field effect transistor is then greater than zero volts in the forward biasing direction.
Claim 11
Dependent Claim
51 words
A system of driving a junction field effect transistor according to claim 5, in which said circuit means includes an active element having a control electrode, a first and a second current electrode and connected with said field effect transistor in Darlington connection for over-driving said field effect transistor as aforesaid.
Claim 12
Dependent Claim
118 words
An amplifier circuit for significantly improving the utilization rate of its power source voltage by overdriving a junction FET in its power amplifying stage comprising: a power amplifying stage including said junction FET, an input terminal, a driving stage for driving said power amplifying stage, first circuit means for electrically connecting said input terminal and driving stage, and said driving stage having circuit parameter means for causing a forward gate-to-source voltage to be applied to the junction FET at the vicinity of the instantaneous peaks of an input terminal signal having a large amplitude which is in the range close to the maximum amplitude that can be faithfully handled by both said driving stage and first circuit means.
Claim 13
Dependent Claim
118 words
An amplifier circuit for significantly improving the utilization rate of its power source voltage by overdriving a junction FET in its power amplifying stage comprising: a power amplifying stage including said junction FET, an input terminal, a driving stage for driving said power amplifying stage, first circuit means for electrically connecting said input terminal and driving stage, and said driving stage having circuit parameter means for causing a forward gate-to-source voltage to be applied to the junction FET at the vicinity of the instantaneous peaks of an input terminal signal having a large amplitude which is in the range close to the maximum amplitude that can be faithfully handled by both said driving stage and first circuit means.
Claim 14
Dependent Claim
35 words
An amplifier circuit as in claim 7 wherein said driving stage includes a source follower FET the source electrode of which is dc-coupled to the gate electrode of the FET of the power amplifying stage.
Claim 15
Dependent Claim
37 words
An amplifier circuit as in claim 8 wherein the gate electrode of said driving stage FET is connected to said input terminal and is dc-coupled to the source electrode of the FET of the power amplifying stage.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1981-06-05 | 1981-12-05 | 1982-06-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1985-06-05 | 1985-12-05 | 1986-06-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1989-06-05 | 1989-12-05 | 1990-06-06 | $7700.00 | Window Closed / Lapsed |