Annunciator communication system

Claim 2

An annunciator communications system comprising a plurality of identical transmitter-receiver units each having the capability of signaling and communicating with all of said units, each of said units comprising: data input means for entering data to be transmitted and for converting said data into corresponding binary coded data signals, said data input means including a plurality of manually operated switches; transmitting means coupled to said data input means for receiving each of said data signals in parallel from said input means and for transmitting said data signals in series through a communications medium; receiving means for receiving an input signal from said communications medium, said receiving means including circuitry for detecting and decoding said binary signals and for producing an output signal at one of a plurality of output terminals, each of said output terminals corresponding to one of said plurality of switches in said data input means; and display means coupled to said receiving means for visibly displaying a character represented by said output signal, said display means including means for displaying additional characters and for continuing the display of said characters until said display means is cleared by a signal originating at said data input means.

Claim 3

The system claimed in claim 1 wherein said data input means includes manually operated switches representing the numbers 0-9 and the functions "clear" and "alarm".

Claim 4

The system claimed in claim 2 wherein said transmitting means and said receiving means include the transmitting and receiving sections, respectively, of a universal asynchronous receiver/transmitter.

Claim 5

The system claimed in claim 2 wherein said transmitting means includes circuitry for modulating an RF signal with said data signals.

Claim 6

The system claimed in claim 4 wherein said receiving means includes circuitry for detecting parity and overrun errors in said binary coded data signals and for preventing the passage of erroneous signals from said receiving means.

Claim 7

The system claimed in claim 5 wherein said display means includes the circuitry of a digital calculator having a plurality of input terminals, the particular interconnection of said input terminals causing the display of particular numerals.

Claim 8

The system claimed in claim 6 wherein said receiving means further includes multiplex circuitry coupled to the output terminals of said decoder and to the input terminals of said digital calculator circuitry of interconnecting particular output terminals to said calculator circuitry.

Claim 9

The system claimed in claim 7 further including an audible alarm coupled to respond to an output signal at a particular one of said plurality of output terminals of said decoder.

Claim 10

The system claimed in claim 8 further including signaling circuitry coupled to an output terminal of said decoder and responsive to the actuation of an additional signaling switch in said data input means, said signaling circuitry including a latch set by a signal on the corresponding output terminal of said decoder and reset by a signal that causes said calculator circuitry to be cleared.

Claim 11

An annunciator communications system comprising a plurality of identical transmitter-receiver units each of said units having the capacity to signal and communicate with all of said units, each of said unit comprising: an input keyboard comprising a plurality of switches for entering data to be transmitted; encoding means coupled to said keyboard for converting the input data into corresponding binary coded data; digital transmitter logic circuitry coupled to said encoding means, said circuitry including register means for receiving said binary coded data from said encoding means and for serially shifting out said data through its output terminal; means coupled to the output terminal of said digital transmitter logic circuitry for generating and transmitting an RF signal modulated with said binary coded data; receiving means for receiving an RF input signal modulated with said binary coded data, and for detecting and shaping the detected signal into a signal representing said binary coded data; signal checking means coupled to said receiving means for testing said signal representing said binary coded data for parity and overrun errors; digital receiver logic circuitry coupled to said receiving means and said signal checking means, said receiver logic circuitry including register means for serially receiving said binary coded data and for outputting said data in parallel under the control of said signal checking means; decoding circuitry coupled to said receiver logic circuitry for decoding said binary coded data and for producing an output signal at one of a plurality of output terminals, each of said output terminals corresponding to one position of said input keyboard; and display means coupled to said decoding circuitry for converting the output signal at each of said plurality of output terminals into a corresponding numeric character and for displaying said character, said display means including circuitry for displaying a plurality of additional numeric characters and for continuing the display of said characters until said display means receives a signal to clear said display.

Claim 12

An annunciator communications system comprising a plurality of identical transmitter-receiver units each of said units having the capacity to signal and communicate with all of said units, each of said unit comprising: an input keyboard comprising a plurality of switches for entering data to be transmitted; encoding means coupled to said keyboard for converting the input data into corresponding binary coded data; digital transmitter logic circuitry coupled to said encoding means, said circuitry including register means for receiving said binary coded data from said encoding means and for serially shifting out said data through its output terminal; means coupled to the output terminal of said digital transmitter logic circuitry for generating and transmitting an RF signal modulated with said binary coded data; receiving means for receiving an RF input signal modulated with said binary coded data, and for detecting and shaping the detected signal into a signal representing said binary coded data; signal checking means coupled to said receiving means for testing said signal representing said binary coded data for parity and overrun errors; digital receiver logic circuitry coupled to said receiving means and said signal checking means, said receiver logic circuitry including register means for serially receiving said binary coded data and for outputting said data in parallel under the control of said signal checking means; decoding circuitry coupled to said receiver logic circuitry for decoding said binary coded data and for producing an output signal at one of a plurality of output terminals, each of said output terminals corresponding to one position of said input keyboard; and display means coupled to said decoding circuitry for converting the output signal at each of said plurality of output terminals into a corresponding numeric character and for displaying said character, said display means including circuitry for displaying a plurality of additional numeric characters and for continuing the display of said characters until said display means receives a signal to clear said display.