Read only memory

Claim 2

A read-only memory comprising a sequence of storage-in buses; a plurality of storage-out buses representing respectively 2°, 2 1 . . . 2 n , said storage-out buses being respectively connected to corresponding ones of said sequence of storage-in buses, pairs of diodes including anodes and cathodes and junctions connecting said anodes, the cathodes of each pair being connected to selected of said storage-out buses of adjacent order, intermediate buses of a first rank being connected between said junctions and selected of said storage-in buses, further pairs of diodes including anodes and cathodes and junctions connecting the latter said anodes, further intermediate buses of a second rank connected between the latter said junctions and selected of said storage-in buses, additional pairs of diodes and additional intermediate buses being connected in pyramidal relationship of further sequential ranks until only one said additional intermediate bus is connected as a final rank to one of said storage-in buses, and further diodes interconnecting selected of said storage-in buses with said storage-out buses such that said storage-out buses operating in conjunction with said intermediate buses are adapted to express a sequence of digital numbers with a minimal number of diodes and thereby with increased reliability.

Claim 3

A read-only memory comprising storage-in buses; unilateral conductivity elements; storage-in buses connected to the first said storage-in buses by means of the said unilateral conductivity elements in accordance with the significant position "weights" of stored coded words; at least one intermediate bus directly connected to one of said storage-in buses; storage-out buses; at least two other unilateral conductivity elements having two pairs of like terminals and being connected to each other by one of said pairs of like terminals to form a junction connected to the other end of the said intermediate bus and with the other terminals of the latter said elements connected to the storage-out buses, forming thereby a combination of first rank, at least one additional bus directly connected to one of the said storage-in buses; at least two other unilateral conductivity elements having two pairs of like terminals and being connected to each other by one of said pairs of like terminals to form a junction connected to the other end of the said additional bus and with the other terminals of the latter said elements connected to thecorresponding said intermediate buses forming thereby a combination of second rank, and at least one subsequent rank being formed including at least one further bus connected to two additional buses of the preceding lower rank, the number of all ranks being less that that of the storage-out buses by one.

Claim 4

A read-only memory comprising storage-in buses; unilateral conductivity elements; storage-in buses connected to the first said storage-in buses by means of the said unilateral conductivity elements in accordance with the significant position "weights" of stored coded words; at least one intermediate bus directly connected to one of said storage-in buses; storage-out buses; at least two other unilateral conductivity elements having two pairs of like terminals and being connected to each other by one of said pairs of like terminals to form a junction connected to the other end of the said intermediate bus and with the other terminals of the latter said elements connected to the storage-out buses, forming thereby a combination of first rank, at least one additional bus directly connected to one of the said storage-in buses; at least two other unilateral conductivity elements having two pairs of like terminals and being connected to each other by one of said pairs of like terminals to form a junction connected to the other end of the said additional bus and with the other terminals of the latter said elements connected to thecorresponding said intermediate buses forming thereby a combination of second rank, and at least one subsequent rank being formed including at least one further bus connected to two additional buses of the preceding lower rank, the number of all ranks being less that that of the storage-out buses by one.

Claim 5

A read-only memory according to claim 2 in which the storage-in bus having a number corresponding to the significant position "weight" of one of said storage-out buses, is directly connected to the latter said one storage-out bus; the storage-in bus having a number determined by a plurality of the neighboring positions of two corresponding storage-out buses, being connected to the intermediate bus of the first rank and the storage-in bus having a number determined by a plurality of the significant positions of three neighboring of the above-said storage-out buses being directly connected to the corresponding additional bus of the second rank.

Claim 6

A read-only memory according to claim 3 in which the storage-in bus having a number determined by a plurality of the significant position "weight" of two said storage-out buses connected to the corresponding intermediate bus and by the positin "weight" of the storage-out not adjacent the said storage-out buses, is connected through the corresponding unilateral conductivity element to the last said storage-out bus and to the said intermediate bus.

Claim 7

A read-only memory according to claim 4 in which the storage-in bus having a number determined by a plurality of the position "weights" of the storage-out buses connected to two intermediate buses connected to the corresponding additional bus, and by the position "weight" of the storage-out bus not adjacent the said storage-out buses, is connected through the corresponding unilateral conductivity elements to the last said storage-out bus and the said additional bus.

Claim 8

A read-only memory according to claim 5 in which the storage-in bus, having a number determined by a plurality of the significant position "weights" of the said storage-out buses connected to two non-adjacent intermediate buses, is connected to these intermediate buses by means of the corresponding unilateral conductivity elements.

Claim 9

A read-only memory according to claim 6 in which the storage-in bus, having a number determined by a plurality of the significant position "weights" of the said storage-out buses bonded to two non-adjacent additional buses, is connected through the corresponding unilateral conductivity elements to these additional buses.

Claim 10

A read-only memory according to claim 7 in which the storage-in bus, having a number determined by a plurality of the significant position "weights" of the said storage-out buses bonded to the additional bus, and by a plurality of the significant position "weights" of the storage-out buses not adjacent the said storage-out buses connected to the intermediate bus, is connected through the corresponding unilateral conductivity elements to the said intermediate and additional buses.

Claim 11

A read-only memory according to claim 8 comprising at least one connecting bus directly connected to one of the said buses and connected through a unilateral conductivitly element to the other storage-in bus.