Electron device

Claim 2

An electron device comprising (i) a semiconductor element which includes a semiconductor region A of a first conductivity type, a semiconductor region B of a second conductivity type adjoining said region A, and a semiconductor region C of said second conductivity type adjoining said region A and isolated from said region B by said region A, said regions A, B, and C being made by single crystal silicon, and in which on a surface extending from said region B via said region A to said region C, a gate electrode is provided through an insulating film, (ii) means for applying a forward bias voltage of at most 0.6V between said region A and said region B, (iii) means for applying a voltage between said region C and said region B by which a potential relative to the minority carriers existing in said region A becomes lower in said region C than in said region B, and (iv) means for applying to said gate electrode a potential by which a surface portion of said region A directly under said gate electrode is made a weak-inversion region.

Claim 3

The electron device according to claim 1, wherein said region A is made of a semiconductor substrate of said first conductivity type, and said regions B and C are formed in surface portions of said semiconductor substrate.

Claim 4

The electron device according to claim 1, wherein said region A is a region of said first conductivity type which is formed in the shape of a well from a surface of a semiconductor substrate of said second conductivity type, and said regions B and C are constructed so that at least a part of each of these regions may exist in a surface portion of the well-shaped region A.

Claim 5

The electron device according to claim 3, wherein a high concentration region of said first conductivity type is provided, at least a part thereof existing in a surface portion of said region A.

Claim 6

The electron device according to claim 1, wherein said gate electrode is connected with said region B.

Claim 7

The electron device according to claim 1, wherein said gate electrode is connected with said region A.

Claim 8

The electron device according to claim 1, wherein said gate electrode is connected with said region C.

Claim 9

The electron device according to claim 1, wherein said gate electrode is connected with a power supply terminal.

Claim 10

The electron device according to claim 1, wherein said gate electrode is made of polycrystalline silicon.

Claim 11

The electron device according to claim 1, wherein a plurality of such semiconductor elements are integrated.

Claim 12

The electron device according to claim 3, wherein a high concentration region of said second conductivity type is provided in a surface portion of said semiconductor substrate as lies between the regions A.

Claim 13

The electron device according to claim 3, wherein a high concentration region of said first conductivity type is provided in a surface portion of said semiconductor substrate as lies around said region A.

Claim 14

The electron device according to claim 1, wherein said regions A, B and C are formed on a sapphire substrate.

Claim 15

The electron device according to claim 3, wherein a conductive electrode is provided through an insulating film on a surface of said region C.

Claim 16

A semiconductor device comprising: a semiconductor body having a first surface and including a first semiconductor region of a first conductivity type disposed in a first portion of said body and extending to said first surface; and second and third semiconductor regions of a second conductivity type, opposite said first conductivity type, disposed in second and third respective portions of said body separated from one another by said first portion of said body, said second and third regions defining respective first and second PN junctions with said first semiconductor region; a layer of insulating material disposed on said first surface of said body so as to overlie said first portion of said body and the terminations of said first and second PN junctions at said first surface; an electrode disposed on said layer of insulating material so as to overlie said first portion of said body therebeneath, first means for applying a first prescribed voltage as a forward bias voltage between said first and second regions for causing minority carriers relative to said first semiconductor region to be injected from said second semiconductor region into said first semiconductor region; second means for imparting a second prescribed voltage between said second and third semiconductor regions for causing the potential in said third semiconductor region relative to said minority carriers to be lower than the potential in said second region; and third means for applying a third prescribed voltage to said electrode to establish a weak-inversion region in the surface of said first portion of said body directly beneath said electrode.

Claim 17

A semiconductor device comprising: a semiconductor body having a first surface and including a first semiconductor region of a first conductivity type disposed in a first portion of said body and extending to said first surface; and second and third semiconductor regions of a second conductivity type, opposite said first conductivity type, disposed in second and third respective portions of said body separated from one another by said first portion of said body, said second and third regions defining respective first and second PN junctions with said first semiconductor region; a layer of insulating material disposed on said first surface of said body so as to overlie said first portion of said body and the terminations of said first and second PN junctions at said first surface; an electrode disposed on said layer of insulating material so as to overlie said first portion of said body therebeneath, first means for applying a first prescribed voltage as a forward bias voltage between said first and second regions for causing minority carriers relative to said first semiconductor region to be injected from said second semiconductor region into said first semiconductor region; second means for imparting a second prescribed voltage between said second and third semiconductor regions for causing the potential in said third semiconductor region relative to said minority carriers to be lower than the potential in said second region; and third means for applying a third prescribed voltage to said electrode to establish a weak-inversion region in the surface of said first portion of said body directly beneath said electrode.

Claim 18

A semiconductor device according to claim 15, wherein the absolute value of said first prescribed voltage is at most 0.6 volts.