US4086694A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of making direct metal contact to buried layer
Assignee: International Telephone and Telegraph Corp
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Filing: 1976-12-17
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Granted: 1978-05-02
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Expires: 1996-12-17
Abstract
Abstract An integrated circuit having a direct metal contact to a buried layer is fabricated by first diffusing said buried layer into a substrate and growing thereon an epitaxial layer. After emitter diffusion into the epitaxial layer and emitter oxidation, a sink hole is etched through the oxide mask, the epitaxial layer, and into the buried layer. An oxide layer is then grown over the surface of the sink hole; which oxide layer is then coated with a negative photoresist. The negative photoresist is exposed to collimated light at an incident angle which results in an unexposed area of photoresist at the bottom of the sink hole. The unexposed area is washed off during developing and the exposed oxide etched away, thereby exposing the buried layer. A metal may be deposited, for example, by evaporation, thus creating a direct metal contact to the buried layer. Also, similar techniques with appropriate variations can be used for direct metal contact to the substrate from the top of the wafer, especially significant whenever insulator isolation processes are employed.
Inventors
- 👤 Aung San U
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 06:43
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/20; H10D64/23; H10D64/231; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/014; H10W10/0142; H10W10/10; H10W10/17; H10W20/00; H10W20/01; H10W20/021; H10P; H10P14/00; H10P14/60; H10P14/63; H10P14/6302; H10P14/6304; H10P14/6314; H10P14/6324; H10P14/69; H10P14/692; H10P14/6938; H10P14/6939; H10P14/69391; Y; Y10; Y10S; Y10S148/00; Y10S148/143
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
191 words
A method of providing a direct metal contact to a buried region of a semiconductor device of the type wherein an intermediate layer is formed over said buried region, said intermediate layer having a first type conductivity and said buried region having a second type conductivity, comprising: forming spaced regions of a first protective layer on said intermediate layer; forming an opening in said intermediate layer using said spaced regions as a mask, thus exposing said buried region; forming a second protective layer of dielectric material in said opening for coating said opening and said exposed buried region; removing a portion of said second layer at the bottom of said opening for exposing said buried region, said step of removing comprising: applying a negative photoresist to the surface of said second layer; exposing said negative photoresist to a collimated beam of light at an angle of incidence such that the negative photoresist on said portion remains unexposed; developing the exposed photoresist; and removing said portion of said second layer beneath said unexposed negative photoresist; and filling said opening with metal, said metal contacting the exposed buried region forming said direct contact.
Claim 2
Independent Claim
191 words
A method of providing a direct metal contact to a buried region of a semiconductor device of the type wherein an intermediate layer is formed over said buried region, said intermediate layer having a first type conductivity and said buried region having a second type conductivity, comprising: forming spaced regions of a first protective layer on said intermediate layer; forming an opening in said intermediate layer using said spaced regions as a mask, thus exposing said buried region; forming a second protective layer of dielectric material in said opening for coating said opening and said exposed buried region; removing a portion of said second layer at the bottom of said opening for exposing said buried region, said step of removing comprising: applying a negative photoresist to the surface of said second layer; exposing said negative photoresist to a collimated beam of light at an angle of incidence such that the negative photoresist on said portion remains unexposed; developing the exposed photoresist; and removing said portion of said second layer beneath said unexposed negative photoresist; and filling said opening with metal, said metal contacting the exposed buried region forming said direct contact.
Claim 3
Dependent Claim
31 words
A method according to claim 1 wherein said forming of spaced regions comprises: forming said first protective layer on said intermediate layer; and removing selected portions of said first protective layer.
Claim 4
Dependent Claim
14 words
A method according to claim 2 wherein said selected portions are removed by etching.
Claim 5
Dependent Claim
17 words
A method according to claim 1 wherein said opening in said intermediate layer is removed by etching.
Claim 6
Dependent Claim
73 words
A method according to claim 1 wherein said filling comprises: depositing a layer of metal over said device, thereby depositing said metal layer on said first protective layer and filling said opening; depositing a positive photoresist on said metal layer; exposing unwanted metal without said opening to a collimated light source such that the metal in said opening remains unexposed; developing said positive photoresist; and removing unwanted metal under the exposed positive photoresist.
Claim 7
Dependent Claim
80 words
A method according to claim 5 wherein said buried region is diffused into a substrate of semiconductor material and further including the steps of: forming a plurality of openings simultaneously with said first opening, each of said plurality exposing said substrate; coating the surface of each of said plurality of openings with said second layer; depositing a metal in each of said plurality of openings; and anodizing the metal in each of said plurality of openings to provide electrical isolation.
Claim 8
Dependent Claim
47 words
A method according to claim 6 wherein said intermediate layer is an epitaxial layer forming the base of a transistor and said buried layer forms a collector of said transistor and where an emitter region is disposed beneath said first protective layer and within said epitaxial layer.
Claim 9
Dependent Claim
32 words
A method according to claim 7 further including: opening contact windows through said first protective layer to expose said base and said emitter; and forming metal contacts to said base and emitter.
Claim 10
Dependent Claim
14 words
A method according to claim 8 wherein said metal is aluminum deposited by evaporation.
Claim 11
Dependent Claim
22 words
A method according to claim 6 wherein said anodizing takes place after the unwanted metal is removed from said first protective layer.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1981-05-01 | 1981-10-31 | 1982-05-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1985-05-01 | 1985-10-31 | 1986-05-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1989-05-01 | 1989-10-31 | 1990-05-02 | $7700.00 | Window Closed / Lapsed |