Fast switching phase lock loop system

Claim 2

A phase lock loop system for decreasing the phase settling time for phase coherency with a reference frequency immediately after lock when switching from one desired frequency to another desired frequency, comprising: a voltage controlled oscillator for generating at its output a frequency signal that varies as a function of its input voltage; phase comparator means to generate at its output an alternating output signal that decreases in frequency to provide a frequency modulation ramp as the difference between the oscillator frequency and the reference frequency decreases; a low pass filter means responsive to the frequency modulation of the phase comparator means output to generate at its output a single pulse of a predetermined theshold value, said filter having a response time matching a predetermined frequency modulation rate of the phase comparator means output such that the duration of one period of the filter cut-off frequency is substantially equal to the duration of the predetermined frequency modulation rate of the phase comparator means to generate said single pulse at a precise time substantially in the center of the capture range, tuning loop means when connected coupling electrically the output of the phase comparator means to the input of the oscillator, said tuning loop means also including means operative to generate a constant voltage output when the phase comparator means output is at zero error potential to lock the phase of the oscillator frequency to the phase of the reference frequency; a normally inactive current sweep source operative when activated to change the input voltage to the oscillator at a predetermined rate to provide such predetermined frequency modulation rate at the output of the comparator means; first circuit means responsive to a change to a desired frequency to activate the current sweep source and disconnect the tuning loop means from the oscillator input; and second circuit means responsive to said single pulse to deactivate the current sweep source and connect the tuning loop means to the oscillator substantially simultaneously.

Claim 3

A phase lock loop system for decreasing the phase settling time immediately after lock for phase coherency with a reference frequency when switching from one desired frequency to another desired frequency, comprising: a voltage controlled oscillator having a coarse and a fine tuning port, said coarse and fine tuning ports varying the frequency and phase of the oscillator output signal as a function of the value of a first and second oscillator input signal respectively; phase comparator means operatively connected to compare the frequency and phase of a reference frequency with the frequency and phase of the oscillator output signal, said means being operative to generate at its output an alternating output signal that decreases in frequency toward zero to provide an FM ramp as the difference between the oscillator frequency and reference frequency decreases; first circuit means when connected to couple the output of the phase comparator means to the fine tuning port to generate the second oscillator signal when the reference and oscillator frequencies are out of a desired phase relationship, second circuit means including an integrator connected to the coarse tuning port to vary the value of the oscillator input signal as a function of the duration and amplitude of a signal applied to the integrator input, a low pass filter means responsive to the frequency modulation of the phase comparator means output to generate at its output a single pulse of a predetermined threshold value, said filter having a response time matching a predetermined frequency modulation rate of the phase comparator means output such that the duration of one period of the filter cut-off frequency is substantially equal to the duration of the frequency modulation ramp of the phase comparator means to generate said single pulse at a precise time substantially in the center of the capture range, a sweep current source operative when activated to change the value of the integrator output signal at a predetermined rate to provide said predetermined frequency modulation rate to cause the duration of the frequency modulation ramp at the output of the phase comparator means to generate said single pulse when the first circuit means is at substantially zero error potential; third circuit means for activating the sweep current source and disconnecting electrically the first circuit means from the fine tuning port in response to a detected change between reference and oscillator frequencies by the comparison means, and fourth circuit means responsive to the threshold value of the single pulse of the filter means to deactivate the sweep current source and connect the first circuit means to the fine tuning port substantially simultaneously.

Claim 4

A phase lock loop system for decreasing the phase settling time immediately after lock for phase coherency with a reference frequency when switching from one desired frequency to another desired frequency, comprising: a voltage controlled oscillator having a coarse and a fine tuning port, said coarse and fine tuning ports varying the frequency and phase of the oscillator output signal as a function of the value of a first and second oscillator input signal respectively; phase comparator means operatively connected to compare the frequency and phase of a reference frequency with the frequency and phase of the oscillator output signal, said means being operative to generate at its output an alternating output signal that decreases in frequency toward zero to provide an FM ramp as the difference between the oscillator frequency and reference frequency decreases; first circuit means when connected to couple the output of the phase comparator means to the fine tuning port to generate the second oscillator signal when the reference and oscillator frequencies are out of a desired phase relationship, second circuit means including an integrator connected to the coarse tuning port to vary the value of the oscillator input signal as a function of the duration and amplitude of a signal applied to the integrator input, a low pass filter means responsive to the frequency modulation of the phase comparator means output to generate at its output a single pulse of a predetermined threshold value, said filter having a response time matching a predetermined frequency modulation rate of the phase comparator means output such that the duration of one period of the filter cut-off frequency is substantially equal to the duration of the frequency modulation ramp of the phase comparator means to generate said single pulse at a precise time substantially in the center of the capture range, a sweep current source operative when activated to change the value of the integrator output signal at a predetermined rate to provide said predetermined frequency modulation rate to cause the duration of the frequency modulation ramp at the output of the phase comparator means to generate said single pulse when the first circuit means is at substantially zero error potential; third circuit means for activating the sweep current source and disconnecting electrically the first circuit means from the fine tuning port in response to a detected change between reference and oscillator frequencies by the comparison means, and fourth circuit means responsive to the threshold value of the single pulse of the filter means to deactivate the sweep current source and connect the first circuit means to the fine tuning port substantially simultaneously.

Claim 5

A system according to claim 1 wherein the phase comparator means includes a pair of phase detectors that are connected in quadrature, and said filter means includes a low pass filter for the output of each of said phase comparator means.

Claim 6

A system according to claim 1 wherein the tuning loop means includes an integrator, and further comprising: third circuit means responsive to a deviation of a selected input voltage to the oscilltor upon the connection of the tuning loop means by said second circuit means to apply any error signal occurring in the tuning loop means to the input of the integrator for a limited time interval.

Claim 7

A system according to claim 1 wherein the current sweep source includes a current generating source operative to generate a signal of a selected amplitude of opposite polarities successively for a first period of time, and means to generate an input signal of a predetermined lower amplitude upon the expiration of said first time period while the tuning loop means is disconnected by the first circuit means.

Claim 8

A system according to claim 2 wherein the sweep current source includes a first current generating source operative to generate a signal of opposite polarities successively for a first period of time insufficient to lock the phase lock loop, and a second current generating source operative to generate an input signal of a predetermined amplitude upon the expiration of said first time period while the first circuit means is disconnected.