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US4082394A Expired / Lapsed US ⏱️ 0.0 years remaining

Metallized ceramic and printed circuit module

Assignee: International Business Machines Corp
•
Filing: 1977-01-03
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Granted: 1978-04-04
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Expires: 1997-01-03
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Abstract

Abstract A package assembly which combines metallized ceramic technology and printed circuit board multilayer technology. A plurality of modules on a metallized ceramic substrate have closely spaced pins, for example, on 50 mil centers or grid, are plugged into a complex high precision multilayer printed circuit carrier. The pins are staggered in height with the longer pins having a relatively wide spacing, for example, on 100 mil centers or grid. The longer pins protrude through the high precision carrier and plug into a normal relatively simple and low cost printed circuit card or planar package.

Inventors

  • 👤 Ronald Walker Gedney
  • 👤 Robert Richard Rodite

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 23:31
CPC Classifications
H; H01; H01R; H01R12/00; H01R12/50; H01R12/51; H01R12/55; H01R12/58; H05; H05K; H05K1/00; H05K1/02; H05K1/14; H05K1/141; H05K2201/00; H05K2201/09; H05K2201/09009; H05K2201/09063; H05K2201/09209; H05K2201/095; H05K2201/096; H05K2201/09654; H05K2201/097; H05K2201/09709; H05K2201/10; H05K2201/10227; H05K2201/10295; H05K2201/10303; H05K2201/10613; H05K2201/10621; H05K2201/10659; H05K2201/10704; H05K2201/10742; H05K2201/10886; H05K2201/10939; H05K3/00; H05K3/30; H05K3/32; H05K3/34; H05K3/3447; H05K3/36; H05K3/368; H10; H10W; H10W90/00; H10W90/701; H10W90/721; H10W90/724

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 243 words
A metallized ceramic and printed circuit module which comprises: a plurality of integrated circuit chips; a metallized circuit ceramic substrate on which said chips are mounted with one layer of circuit lines on the surface of said substrate being connected to said chips, the number of interconnections between said circuit lines and chips being limited because no two of said circuit lines can cross; a plurality of I/O pins arranged on a closely spaced pin grid to provide a high I/O pin density and which pins are staggered in height to provide short pins and relatively longer pins; a multilayer organic printed circuit carrier having a plurality of signal, ground and voltage planes and having plated thru holes connected to said planes and arranged on a pin grid corresponding to the pin grid of said module and into which said pins are plugged with said longer pins protruding out the other side of the carrier and said shorter pins ending with said carrer, said high I/O pin density allowing multichip wiring to provide said multilayer carrier with ample wireability for multichip applications, said interconnections between said short pins compensating for the lack of crossover ability in the layer of circuit lines on said ceramic substrate; and a printed circuit card having plated thru holes arranged on a low I/O pin density grid corresponding to only that of said longer pins and into which said longer pins are plugged to connect with circuitry thereon.
Claim 2
Dependent Claim 243 words
A metallized ceramic and printed circuit module which comprises: a plurality of integrated circuit chips; a metallized circuit ceramic substrate on which said chips are mounted with one layer of circuit lines on the surface of said substrate being connected to said chips, the number of interconnections between said circuit lines and chips being limited because no two of said circuit lines can cross; a plurality of I/O pins arranged on a closely spaced pin grid to provide a high I/O pin density and which pins are staggered in height to provide short pins and relatively longer pins; a multilayer organic printed circuit carrier having a plurality of signal, ground and voltage planes and having plated thru holes connected to said planes and arranged on a pin grid corresponding to the pin grid of said module and into which said pins are plugged with said longer pins protruding out the other side of the carrier and said shorter pins ending with said carrer, said high I/O pin density allowing multichip wiring to provide said multilayer carrier with ample wireability for multichip applications, said interconnections between said short pins compensating for the lack of crossover ability in the layer of circuit lines on said ceramic substrate; and a printed circuit card having plated thru holes arranged on a low I/O pin density grid corresponding to only that of said longer pins and into which said longer pins are plugged to connect with circuitry thereon.

References Cited (Backward Citations)

US2766435A Cited
US3333225A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1981-04-03 1981-10-03 1982-04-04 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1985-04-03 1985-10-03 1986-04-04 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1989-04-03 1989-10-03 1990-04-04 $7700.00 Window Closed / Lapsed

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