Dynamic background subtraction circuit

Claim 2

In a system for detecting and displaying radiation energy spectra, a method for improving display resolution by elimination of background noise comprising the steps of a. detecting and processing to a first series of pulses the radiation events occurring in a selected energy band of interest; b. detecting and processing to a second series of pulses the radiation events occurring in at least one selected background energy band whose background counts are comparable to the background counts in the said band of interest. c. counting the pulses of said first series; d. simultaneously subtracting from that count the pulses of said second series to produce an output pulse train that is the difference in the number of pulses between both series of pulses; e. and utilizing said output pulse train to drive a display.

Claim 3

In this system of claim 1, the further step comprising placing a predetermined limit on the subtraction of background pulses such that, when the limit is reached, no further subtraction operations will occur.

Claim 4

In a system for detecting and displaying radiation energy spectra having means for detecting and processing to a first series of pulses the radiation events occurring in a selected energy band of interest and means for detecting and processing to a second series of pulses the radiation events occurring in at least one selected background energy band whose background counts are comparable to counts in the said band of interest, a dynamic background subtraction circuit for improving the display image by elimination of background noise comprising: a. an up/down counter; b. means applying the first series of pulses to one input of the up/down counter, such that each pulse results in a "count up" operation; c. means applying the second series of pulses to a second input of said up/down counter, such that each pulse results in "count down" operation; d. means presetting said up/down counter in a fully-loaded (highest count) state such that if said "count-up" operation occurs before said "count-down" operation, said up/down counter will generate a "carry" pulse at the counter output; and e. presetting means whereby each "carry pulse" at the counter output presets or "loads" the up/down counter to its fully-loaded state.

Claim 5

In a system for detecting and displaying radiation energy spectra having means for detecting and processing to a first series of pulses the radiation events occurring in a selected energy band of interest and means for detecting and processing to a second series of pulses the radiation events occurring in at least one selected background energy band whose background counts are comparable to counts in the said band of interest, a dynamic background subtraction circuit for improving the display image by elimination of background noise comprising: a. an up/down counter; b. means applying the first series of pulses to one input of the up/down counter, such that each pulse results in a "count up" operation; c. means applying the second series of pulses to a second input of said up/down counter, such that each pulse results in "count down" operation; d. means presetting said up/down counter in a fully-loaded (highest count) state such that if said "count-up" operation occurs before said "count-down" operation, said up/down counter will generate a "carry" pulse at the counter output; and e. presetting means whereby each "carry pulse" at the counter output presets or "loads" the up/down counter to its fully-loaded state.

Claim 6

In the system of claim 3, the dynamic background subtraction circuit further compromising a. means detecting said "carry" pulse and, when said "carry" pulse is present, providing an appropriate duration digital pulse output.

Claim 7

In the system of claim 4, the dynamic background subtraction circuit further comprising a. means routing said digital output pulse into two parallel paths, b. the first of said paths passing said digital output pulse to an external video display counter, etc., which monitors and/or displays the net count rate output, c. the second of said paths passing said digital pulse to the "preset" terminal of said "up/down counter" setting said counter to its fully loaded state.

Claim 8

In the system of claim 3, the dynamic background subtraction circuit further including a. means preventing additional "count down" operations from occurring whenever the numerical output of said up-down counter reaches a predetermined value.