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US4076424A Expired / Lapsed US ⏱️ 0.0 years remaining

Multi-channel implicit ratio computer for sequential signals

Assignee: EIDP Inc
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Filing: 1976-03-24
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Granted: 1978-02-28
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Expires: 1996-03-24
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Abstract

Abstract A multi-channel electrical signal ratioing circuit for a source delivering an electric analog pulse signal sequence having a broadened choice of ratio denominator terms provided by parallel-connected DC-coupled individual signal ratioing circuits each incorporating its own associated gated integrator, variable gain amplifier and at least one sampling circuit to form the several ratios needed. The basic ratioing circuit includes means for compensating against the effects of background influences, such as amplifier signal offsets, line voltage variations and changes in electrical system gains or other anomalies affecting ratio determination accuracy.

Inventors

  • 👤 Edward Stanley Ida

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 19:58
CPC Classifications
G; G01; G01N; G01N21/00; G01N21/17; G01N21/25; G01N21/31; G01N21/314

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 349 words
In a multi-channel electrical signal ratioing circuit for a source delivering an electric analog signal pulse sequence constituting measured parameter signals A 1 , A 2 . . . A n and a plurality of reference signals R 1 , R 2 . . . R m , signal gating and timing means having signal identification means maintaining time coordination with said signal pulse sequence, and gate actuating means responsive to said signal identification means, actuating, for predetermined time durations, the respective gates corresponding to said parameter signals A 1 , A 2 . . . A n , and said reference signals R 1 , R 2 . . . R m , a first variable gain amplifier which imparts a gain G to said parameter and reference signals, a first gated integrator which, during a gated period R, wherein at least one of said reference signals R 1 , R 2 . . . R m is delivered, has a first input terminal receiving the sum of said signal pulse sequence of a given polarity from said amplifier and a substantially constant preselected DC reference voltage K of opposite polarity, and a second input terminal connected to common, a feedback connection between the output side of said gated integrator and said first amplifier to control the gain-determining means thereof, a signal withdrawal circuit connection delivering said output of said first amplifier to a first sampling circuit incorporating at least one gated sampler reserved to the readout of a preselected one of the ratios KA 1 /R, KA 2 /R, . . . KA n /R, where R is the time average of a selected set of reference signals admitted by the gated integrator during said gated period R, and additional individual ratioing channels, each incorporating its own variable gain amplifier, gated integrator feedback and sampling circuit, connected to the output of said first amplifier via said signal withdrawal circuit connection determining additional signal ratios with respect to other reference signal sets R selected from said plurality R 1 , R 2 . . . R m .
Claim 2
Dependent Claim 349 words
In a multi-channel electrical signal ratioing circuit for a source delivering an electric analog signal pulse sequence constituting measured parameter signals A 1 , A 2 . . . A n and a plurality of reference signals R 1 , R 2 . . . R m , signal gating and timing means having signal identification means maintaining time coordination with said signal pulse sequence, and gate actuating means responsive to said signal identification means, actuating, for predetermined time durations, the respective gates corresponding to said parameter signals A 1 , A 2 . . . A n , and said reference signals R 1 , R 2 . . . R m , a first variable gain amplifier which imparts a gain G to said parameter and reference signals, a first gated integrator which, during a gated period R, wherein at least one of said reference signals R 1 , R 2 . . . R m is delivered, has a first input terminal receiving the sum of said signal pulse sequence of a given polarity from said amplifier and a substantially constant preselected DC reference voltage K of opposite polarity, and a second input terminal connected to common, a feedback connection between the output side of said gated integrator and said first amplifier to control the gain-determining means thereof, a signal withdrawal circuit connection delivering said output of said first amplifier to a first sampling circuit incorporating at least one gated sampler reserved to the readout of a preselected one of the ratios KA 1 /R, KA 2 /R, . . . KA n /R, where R is the time average of a selected set of reference signals admitted by the gated integrator during said gated period R, and additional individual ratioing channels, each incorporating its own variable gain amplifier, gated integrator feedback and sampling circuit, connected to the output of said first amplifier via said signal withdrawal circuit connection determining additional signal ratios with respect to other reference signal sets R selected from said plurality R 1 , R 2 . . . R m .
Claim 3
Dependent Claim 62 words
In a multi-channel electrical signal ratioing circuit according to claim 1, wherein said electric analog signal pulse sequence includes a background signal B, the improvement comprising a gated clamp interposed between the output side of said first variable gain amplifier and said signal withdrawal circuit connection delivering said output of said first amplifier to said sampling circuit and said additional ratioing channels.
Claim 4
Dependent Claim 40 words
A multi-channel electrical signal ratioing circuit according to claim 1 wherein each said additional individual ratioing channel withdraws its signal input from the output side of said variable gain amplifier in the immediately preceding one of said individual ratioing channels.
Claim 5
Dependent Claim 22 words
The multi-channel electrical signal ratioing circuit of claim 1 wherein said electric analog pulse sequence is the output of a filter photometer.
Claim 6
Dependent Claim 22 words
The multi-channel electrical signal ratioing circuit of claim 2 wherein said electric analog pulse sequence is the output of a filter photometer.

References Cited (Backward Citations)

US3955096A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1981-02-27 1981-08-29 1982-02-28 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1985-02-27 1985-08-29 1986-02-28 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1989-02-27 1989-08-29 1990-02-28 $7700.00 Window Closed / Lapsed

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