Abstract A linear voltage amplifier includes an input stage which has a P channel MOSFET load device and an N channel input device. The complementary amplifier also includes a feedback circuit which includes a low pass filter coupled between the output stage and the gate electrode of the P channel load device. The P type tub region in which the N channel input MOSFET is located is biased by an adjustable bias circuit to control threshold voltage of the input MOSFET and thereby control the DC level of the output of the complementary amplifier. In one embodiment the biasing circuit includes a P channel MOSFET coupled in series with a diode connected N channel MOSFET between two voltage supply conductors, the gate of the P channel MOSFET being connected to the gate of the P channel MOSFET load device of the input stage. The junction between the P channel MOSFET and the diode connected N channel MOSFET is coupled to one terminal of a high value resistor, the other end of which is connected to the input conductor which is connected to the gate of the N channel input MOSFET.
A complementary field effect transistor amplifier including an output circuit and an input circuit having a field effect transistor load device and a field effect transistor input device coupled in series comprising feedback circuit means coupled between said output stage and a gate electrode of said field effect transistor load device for biasing said field effect transistor load device to cause a controlled output voltage to be produced by said output circuit, wherein said feedback circuit means includes a low pass filter which acts to feedback an output signal produced at an output of said output stage to said field effect transistor load device for preventing incremental excursions of said output signal from substantially affecting the current produced by said field effect transistor load device.
Claim 2
Dependent Claim
125 words
A complementary field effect transistor amplifier including an output circuit and an input circuit having a field effect transistor load device and a field effect transistor input device coupled in series comprising feedback circuit means coupled between said output stage and a gate electrode of said field effect transistor load device for biasing said field effect transistor load device to cause a controlled output voltage to be produced by said output circuit, wherein said feedback circuit means includes a low pass filter which acts to feedback an output signal produced at an output of said output stage to said field effect transistor load device for preventing incremental excursions of said output signal from substantially affecting the current produced by said field effect transistor load device.
Claim 3
Dependent Claim
28 words
The complementary field effect transistor amplifier as recited in claim 1 including at least one intermediate amplification circuit stage coupled between said input circuit and said output circuit.
Claim 4
Dependent Claim
39 words
The complementary field effect transistor amplifier as recited in claim 2 wherein said feedback circuit means includes resistive circuit means coupled between an output of said output stage and said gate electrode of said field effect transistor load device.
Claim 5
Dependent Claim
43 words
The complementary field effect transistor amplifier as recited in claim 3 wherein said feedback means further includes capacitance means coupled to said gate of said field effect transistor load device for acting as a low pass filter in cooperation with said resistive means.
Claim 6
Dependent Claim
43 words
The complementary field effect transistor amplifier as recited in claim 4 further including a complementary transistor inverter having a capacitor coupled between an input and an output thereof, and having its input coupled to said gate of said field effect transistor load device.
Claim 7
Dependent Claim
56 words
The complementary field effect transistor amplifier as recited in claim 1 wherein said field effect transistor input device is located in a tub region and further comprising bias circuit means coupled to said tub region for biasing said tub region at a suitable voltage for adjusting the input threshold voltage of said field effect input transistor.
Claim 8
Dependent Claim
34 words
The complementary field effect transistor amplifier as recited in claim 6 wherein said bias circuit means is externally adjustable for permitting adjustment of a DC output level of said complementary field effect transistor amplifier.