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US4071397A Expired / Lapsed US ⏱️ 0.0 years remaining

Silicon metallographic etch

Assignee: Motorola Solutions Inc
•
Filing: 1973-07-02
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Granted: 1978-01-31
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Expires: 1993-07-02
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Abstract

Abstract A metallographic etch is disclosed which removes silicon at a very low rate. The removal of the silicon at a low rate means that the etch is highly controlled. Additional characteristics of the metallographic etch are that it is non-selective and it removes the silicon uniformly. Its special uses are related to an etch which is specially adapted for minimizing the Q ss charge on a silicon surface, as well as for removing work damage on wafers in which very shallow junction devices are to be formed.

Inventors

  • 👤 Isabelle E. Estreicher
  • 👤 James B. Price

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-07 17:48
CPC Classifications
H; H10; H10P; H10P90/00; H10P90/12; H10P90/126; H10P50/00; H10P50/60; H10P50/64; H10P50/642

Claims Analysis

Total Claims: 16
Claim 1
Independent Claim 63 words
A metallographic etch for use in the manufacture of semiconductor devices for the removal of work damaged silicon material at a uniform rate of 280A ±1% per minute, comprising: a mixture of nitric acid to hydrofluoric acid having a ratio by volume of mixture lying within the range of 600:1 to 750:1 at a temperature within the range of 23° to 25° C.
Claim 2
Dependent Claim 63 words
A metallographic etch for use in the manufacture of semiconductor devices for the removal of work damaged silicon material at a uniform rate of 280A ±1% per minute, comprising: a mixture of nitric acid to hydrofluoric acid having a ratio by volume of mixture lying within the range of 600:1 to 750:1 at a temperature within the range of 23° to 25° C.
Claim 3
Dependent Claim 66 words
In the manufacture of semiconductor devices for the removal of work damaged silicon wafer in a uniform and non-selective manner without texturing the surface of the silicon wafer, the process comprising the steps of: removing less than 3000A of work damaged silicon using an etch of nitric acid and hydrofluoric acid having a ratio by volume of mixture lying within the range of 600:1 to 750:1.
Claim 4
Dependent Claim 66 words
In the manufacture of semiconductor devices for the removal of work damaged silicon wafer in a uniform and non-selective manner without texturing the surface of the silicon wafer, the process comprising the steps of: removing less than 3000A of work damaged silicon using an etch of nitric acid and hydrofluoric acid having a ratio by volume of mixture lying within the range of 600:1 to 750:1.
Claim 5
Dependent Claim 69 words
In a process for use in the manufacture of MOS devices for stabilizing the threshold voltage of such a MOS device the improvement comprising the step of: etching a lapped and polished wafer in which such MOS devices are built, in an etchant solution of a mixture of nitric acid and hydrofluoric acid having a ratio by volume of mixture lying within the range of 600:1 to 750:1 respectively.
Claim 6
Dependent Claim 69 words
In a process for use in the manufacture of MOS devices for stabilizing the threshold voltage of such a MOS device the improvement comprising the step of: etching a lapped and polished wafer in which such MOS devices are built, in an etchant solution of a mixture of nitric acid and hydrofluoric acid having a ratio by volume of mixture lying within the range of 600:1 to 750:1 respectively.
Claim 7
Dependent Claim 26 words
The process as recited in claim 3 wherein the etchant removes silicon from the wafer to a depth lying within the range of 700 to 1000A.
Claim 8
Dependent Claim 26 words
A process as recited in claim 4, in which said etching step is completed prior to any other processing step on the lapped and polished wafer.
Claim 9
Dependent Claim 25 words
A process as recited in claim 4, in which said etching step is completed prior to the growth of the gate oxide on the wafer.
Claim 10
Dependent Claim 26 words
A process as recited in claim 5 in which said etching step is repeated just prior to the growth of the gate oxide on the wafer.
Claim 11
Dependent Claim 62 words
In a process for use in the manufacture of shallow base junction bipolar devices the improvement comprising the step of: etching a lapped and polished wafer in which such bipolar devices are built in an etchant solution of a mixture of nitric acid and hydrofluoric acid having a ratio by volume of mixture lying within the range of 600:1 to 750:1, respectively.
Claim 12
Dependent Claim 62 words
In a process for use in the manufacture of shallow base junction bipolar devices the improvement comprising the step of: etching a lapped and polished wafer in which such bipolar devices are built in an etchant solution of a mixture of nitric acid and hydrofluoric acid having a ratio by volume of mixture lying within the range of 600:1 to 750:1, respectively.
Claim 13
Dependent Claim 26 words
A process as recited in claim 8, wherein the etchant removes silicon from the wafer to a depth lying within the range of 700A to 1000A.
Claim 14
Dependent Claim 25 words
A process as recited in claim 9, in which said etching step is completed prior to any other processing on the lapped and polished wafer.
Claim 15
Dependent Claim 20 words
A process as recited in claim 9, in which said etching step is completed just prior to the base diffusion.
Claim 16
Dependent Claim 20 words
A process as recited in claim 10, in which the etching step is repeated just prior to the base diffusion.

References Cited (Backward Citations)

US3231422A Cited
US3514407A Cited
US3775200A Cited
US3813311A Cited
US4029542A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1981-01-30 1981-08-01 1982-01-31 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1985-01-30 1985-08-01 1986-01-31 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1989-01-30 1989-08-01 1990-01-31 $7700.00 Window Closed / Lapsed

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