Check digit generation and verification apparatus

Claim 1

A keyboard apparatus for generating check digits for use with sequences of decimal digits, including a. a plurality of manually-operable keys of which at least ten (referred to hereafter as decimal digit keys) represent the ten respective decimal digits, b. a plurality of electric switching means associated with the respective decimal digit keys and operative to change from a first to a second switching state on operation of the associated decimal digit key, c. electric encoding means having input circuit means connected with the respective switching means, and output circuit means at which are delivered electric "digit value" signals representative of the particular electric switching means then in said second switching state, d. temporary storage means having input circuit means connected with said output circuit means of said encoding means for receiving therefrom said digit value signals, a plurality of separate storage addresses at which successive digit value signals received from the encoding means during the keying-in of a sequence of decimal digits on said decimal digit keys may be stored temporarily until all of the digits of the sequence have been keyed in, output signal control means, a first output circuit means at which in response to the delivery to said control means of a "sequence complete" control signal are delivered the respective digit value signals then stored in the successive storage addresses, in the sequence in which they had previously been stored in those addresses, and a second output circuit means at which an indexing signal is delivered each time a said digit value signal is delivered to said first output circuit means, e. control signal generating means connected to said output signal control means and operable on completion of the keying-in of a said sequence of decimal digits whereby to supply a said "sequence complete" control signal to said output signal control means, f. electric indexing means having input circuit means connected with said second output circuit means of said temporary storage means whereby to receive said indexing signals, and electric output circuit means at which are delivered electric "digit position" signals representative of the respective positions, in a sequence of decimal value signals then being delivered at said first output circuit of said temporary storage means, of the successive digit value signals, g. a "remainder value" signal producing means comprising an electric storage means having separate storage addresses for holding predetermined "remainder value" signals for each of the respective digit values that may appear in each of the respective digit positions in a said sequence, which storage means has first input circuit means connected to receive said digit value signals from said first output circuit means of said temporary storage means, second input circuit means connected to receive said digit position signals from said output circuit means of said indexing means, and output circuit means at which is delivered in response to corresponding digit value and digit position signals delivered to said first and second input circuit means an electric "remainder value" signal obtained from a storage address corresponding to the digit value and digit position of a decimal digit which is represented by said corresponding digit value and digit position signals, h. an electric "accumulated remainder value" signal storage means having an input circuit means, first and second output circuit means, and a reset circuit means connected to receive `reset` signals from said output circuit means of said indexing means, i. an electric adding means having a first input circuit means connected to receive signals from said output circuit means of said signal producing means, a second input circuit means connected to receive signals from said first output circuit means of said signal storage means, and an output circuit means connected to deliver "sum" signals to said input circuit means of said signal storage means, which "sum" signals represent the sum of the signals received at said first and second input circuit means, and j. an output device connected to receive signals from said second output circuit means of said signal storage means, and having output circuit means at which are delivered, after operation of said control signal generating means whereby to provide a "sequence complete" signal, check digit signals representative of the deviation of the signal then stored in said signal storage means from the nearest multiple of a predetermined modulus number, each said predetermined remainder value being the excess, over the nearest multiple of the modulus number, of the associated decimal digit value when multiplied by a predetermined multiplier dependent on the position in said sequence of the particular decimal digit.