US4065683A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Circuitry for industrial logic systems
Assignee: Schneider Electric USA Inc
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Filing: 1976-04-19
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Granted: 1977-12-27
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Expires: 1996-04-19
Abstract
Abstract An industrial solid state logic system having a device for translating low level input signals into high level output signals, the components of the device being arranged so that an output switching unit responds only to current flowing from a source when fed from a logic gate which is adapted to sink current although it has the capability to source current. A light emitting diode is connected in a circuit of the device to indicate the electrical condition of an output switching component of the device.
Inventors
- 👤 Geoffrey Clarke
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 05:15
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/18; H03K19/00; H03K19/0175; H03K19/018; H03K19/01825; H03K5/00; H03K5/003
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
146 words
A device for use in an industrial logic system for translating a low level input signal into a high level output signal comprising: A. a logic gate adapted to both sink current and source an output signal less than 7 milli-watts, the gate including: 1. a first transistor having an emitter and a collector; 2. a second transistor having an emitter and a collector, the collector being connected to the emitter of the first transistor, the connection providing the output signal of the logic gate when the first transistor is conducting and the second transistor is not conducting; and 3. a first voltage supply connected across the collector of the first transistor and the emitter of the second transistor; B. a second voltage supply; C. a load; and D. an output driver connected in series with the load across the second voltage supply, the driver including:
Claim 2
Independent Claim
146 words
A device for use in an industrial logic system for translating a low level input signal into a high level output signal comprising: A. a logic gate adapted to both sink current and source an output signal less than 7 milli-watts, the gate including: 1. a first transistor having an emitter and a collector; 2. a second transistor having an emitter and a collector, the collector being connected to the emitter of the first transistor, the connection providing the output signal of the logic gate when the first transistor is conducting and the second transistor is not conducting; and 3. a first voltage supply connected across the collector of the first transistor and the emitter of the second transistor; B. a second voltage supply; C. a load; and D. an output driver connected in series with the load across the second voltage supply, the driver including:
Claim 3
Dependent Claim
170 words
a third transistor connected to be controlled only by the output signal from the logic gate by having a base connected in a base circuit to the output of the logic gate so that the third transistor is in a non-conductive state when the logic gate is sinking current or when the base circuit is inadvertently open or grounded; 2. an input terminal connectible to a common rail through a diode to clamp the base circuit and make the third transistor non-conductive and thus non-responsive to the output of the logic gate; 3. a resistor connected to the third transistor to reduce the input impedance of said third transistor and thereby increase the sensitivity of the third transistor; and 4. means for responding to the conduction of the third transistor to cause the ouput driver to emit an output signal greater than 100 watts and responsive to non-conduction of the third transistor to prevent the output from emitting an output signal when the logic gate does not source a current.
Claim 4
Dependent Claim
170 words
a third transistor connected to be controlled only by the output signal from the logic gate by having a base connected in a base circuit to the output of the logic gate so that the third transistor is in a non-conductive state when the logic gate is sinking current or when the base circuit is inadvertently open or grounded; 2. an input terminal connectible to a common rail through a diode to clamp the base circuit and make the third transistor non-conductive and thus non-responsive to the output of the logic gate; 3. a resistor connected to the third transistor to reduce the input impedance of said third transistor and thereby increase the sensitivity of the third transistor; and 4. means for responding to the conduction of the third transistor to cause the ouput driver to emit an output signal greater than 100 watts and responsive to non-conduction of the third transistor to prevent the output from emitting an output signal when the logic gate does not source a current.
Claim 5
Dependent Claim
48 words
A device as claimed in claim 1 wherein the means for responding comprises: A. a fourth transistor for providing the output signal for controlling the load; and B. a fifth transistor regulating the base of the fourth transistor and having its conductive state controlled by the third transistor.
Claim 6
Dependent Claim
38 words
A device as claimed in claim 2 wherein the fifth transistor has an emitter connected in an emitter circuit, and a light emitting diode is connected in the emitter circuit to indicate the condition of the fourth transistor.
Claim 7
Dependent Claim
71 words
A device as claimed in claim 1 wherein the means for responding comprises: A. an oscillative circuit connected in the base circuit and biased into oscillation by current flowing in the base circuit including a transformer having one winding in the base circuit and an output winding; and B. a triac having a gate electrode connected to the output winding and firing in response to output pulses from the oscillative circuit.
Claim 8
Dependent Claim
33 words
A device as claimed in claim 4 wherein a light emitting diode connected back-to-back with another diode is connected to the gate electrode of the triac to indicate the condition of the triac.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1980-12-26 | 1981-06-27 | 1981-12-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1984-12-26 | 1985-06-27 | 1985-12-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1988-12-26 | 1989-06-27 | 1989-12-27 | $7700.00 | Window Closed / Lapsed |