Fault mode detection system

Claim 2

In a control circuit connected to receive a logic input signal from an input device and connected to generate an output signal to an output device, a fault detection system the combination comprising: an FML converter including a converter circuit having an input terminal connected to receive said logic input signal and an output terminal connected to a disable bus, said FML converter being responsive to generate a first logic state at its output terminal when said logic input signal is in a logic state, and being responsive to generate a second logic state at its output terminal when said logic input signal is in a fault condition; and an output circuit connected in circuit between said control circuit and said output device, and connected to said disable bus, said output circuit being responsive to the second logic state generated at said converter output terminal to disconnect said output device from said control Circuit.

Claim 3

The fault detection system as recited in claim 1 in which there are a plurality of input devices and said system includes a fault mode logic gate having an output terminal connected to the input terminal of said FML converter and a plurality of input terminals each connected to an input device; wherein said fault mode logic gate generates a fault indicate signal to said FML converter when one or more of the input devices attached to its input terminals becomes open circuited.

Claim 4

The fault detection system as recited in claim 1 wherein there are a plurality of output devices and a corresponding number of output circuits, each output circuit being connected to an output device and each being connected to said disable bus to disconnect its associated output device from said control circuit when said second logic state is generated on said disable bus.

Claim 5

The fault detection system as recited in claim 1 in which there are a plurality of input devices and said FML converter is comprised of a plurality of converter circuits, each converter circuit having an input terminal connected to receive the logic input signal from one or more of said input devices and each being operable to generate said second logic state on said disable bus when a fault indicate condition is received.

Claim 6

The fault detection system as recited in claim 4 in which said FML converter includes an OR gate and the output terminal of each converter circuit connects to an input terminal on said OR gate and an output terminal on said OR gate connects to said disable bus.

Claim 7

The fault detection system as recited in claim 5 in which there are a plurality of maintenance data indicator circuits and the output terminal of each converter circuit is connected to the input of one of said maintenance data indicator circuits, and each maintenance indicator circuit is responsive to said second logic state to indicate and identify an open circuited input device.

Claim 8

The fault detection system as recited in claim 6 wherein each maintenance indicator circuit includes an illuminating device which is energized when said second logic state is generated by the converter circuit to which it is connected.

Claim 9

An FML converter circuit, the combination comprising: an FML inverter gate having an input terminal and an output terminal; a first blocking diode having one lead connected to said gate input terminal; a second blocking diode having one lead connected to said gate output terminal; an electronic switch which has a control element connected to the other lead of each of said blocking diodes and a pair of current carrying elements; a first logic state voltage source connected to one of said current carrying elements; a second logic state voltage source; and a load resistor connecting said second logic state voltage source to said other current carrying element and to a circuit output terminal; wherein said electronic switch operates to connect one of said logic state voltage sources to said circuit output terminal when a digital signal is applied to said FML inverter gate input terminal, and to connect said other logic state voltage source to said circuit output terminal when a fault indicate signal is applied to said FML gate input terminal.

Claim 10

An FML converter circuit, the combination comprising: an FML inverter gate having an input terminal and an output terminal; a first blocking diode having one lead connected to said gate input terminal; a second blocking diode having one lead connected to said gate output terminal; an electronic switch which has a control element connected to the other lead of each of said blocking diodes and a pair of current carrying elements; a first logic state voltage source connected to one of said current carrying elements; a second logic state voltage source; and a load resistor connecting said second logic state voltage source to said other current carrying element and to a circuit output terminal; wherein said electronic switch operates to connect one of said logic state voltage sources to said circuit output terminal when a digital signal is applied to said FML inverter gate input terminal, and to connect said other logic state voltage source to said circuit output terminal when a fault indicate signal is applied to said FML gate input terminal.

Claim 11

The FML converter circuit as recited in claim 8, wherein said electronic switch is a transistor.

Claim 12

An FML converter comprised of a plurality of substantially identical converter circuits, each converter circuit having an input terminal and each converter circuit having an output terminal connected to both a common converter output terminal and to a load resistor which connects with a first logic state voltage source, each converter circuit comprising: an FML inverter gate having an output terminal and an input terminal connected to the converter circuit input; a current source connected to one terminal of said FML inverter gate; a blocking diode having one lead conneCted to said current source and another lead connected to the other terminal of said FML inverter gate; and an electronic switch having a control element connected to said current source, a first current carrying element connected to said common converter output terminal, and a second current carrying element connected to a second logic state voltage source; wherein said electronic switch is operable to connect said second logic state voltage source to said common converter output terminal when a fault indicate signal is applied to the converter circuit input terminal.

Claim 13

An FML converter comprised of a plurality of substantially identical converter circuits, each converter circuit having an input terminal and each converter circuit having an output terminal connected to both a common converter output terminal and to a load resistor which connects with a first logic state voltage source, each converter circuit comprising: an FML inverter gate having an output terminal and an input terminal connected to the converter circuit input; a current source connected to one terminal of said FML inverter gate; a blocking diode having one lead conneCted to said current source and another lead connected to the other terminal of said FML inverter gate; and an electronic switch having a control element connected to said current source, a first current carrying element connected to said common converter output terminal, and a second current carrying element connected to a second logic state voltage source; wherein said electronic switch is operable to connect said second logic state voltage source to said common converter output terminal when a fault indicate signal is applied to the converter circuit input terminal.

Claim 14

The FML converter as recited in claim 10 wherein said electronic switch is a transistor and a zener diode is connected between its control element and the current source.