Abstract A breakdown preventing protection structure for an insulated gate field effect semiconductor device is disclosed for limiting input voltages to levels not substantially exceeding the supply voltage. A planar insulated gate field effect protection transistor is provided in series with the input. The protection transistor includes a source forming the circuit input, a drain connected to the gate of the device to be protected, and a gate electrode connected to the supply voltage which also supplies the device to be protected. A shunting protective diode may be included at the source of the protection transistor to limit negative input voltages to the diode threshold voltage and positive input voltages to the reverse avalanche breakdown of the protective diode. The protection circuit is particularly well suited to protect V-groove metal oxide semiconductor devices which have breakdown voltages well below breakdown voltages of conventional planar MOS transistor devices.
An input protection device for a V-groove field effect transistor formed in a monolithic semiconductor substrate with a source region therein, base region therein overlying said source, and drain region overlying said base region, at least one V-groove extending into the substrate exposing the base region, an insulative layer overlying the exposed portion of the base region, at least one gate conductor overlying at least a portion of the insulative layer and power supply means connected between said drain and said source through load means, said device comprising a planar field effect transistor formed on said substrate and having its own source, its own drain and its own insulated gate electrode, signal input means for connecting an input signal to said V-groove transistor, said input means being in electrical interconnection with the source of said planar transistor, the drain of said planar transistor being in electrical interconnection with said gate conductor of said V-groove transistor, the insulated gate electrode being in electrical interconnection with said power supply means, and said source of said planar transistor being formed in said substrate in a manner that defines it as a protective diode at a junction of said source and said substrate and at the same time as an input resistor extending from the region of said insulated gate electrode to said signal input means.
Claim 2
Dependent Claim
222 words
An input protection device for a V-groove field effect transistor formed in a monolithic semiconductor substrate with a source region therein, base region therein overlying said source, and drain region overlying said base region, at least one V-groove extending into the substrate exposing the base region, an insulative layer overlying the exposed portion of the base region, at least one gate conductor overlying at least a portion of the insulative layer and power supply means connected between said drain and said source through load means, said device comprising a planar field effect transistor formed on said substrate and having its own source, its own drain and its own insulated gate electrode, signal input means for connecting an input signal to said V-groove transistor, said input means being in electrical interconnection with the source of said planar transistor, the drain of said planar transistor being in electrical interconnection with said gate conductor of said V-groove transistor, the insulated gate electrode being in electrical interconnection with said power supply means, and said source of said planar transistor being formed in said substrate in a manner that defines it as a protective diode at a junction of said source and said substrate and at the same time as an input resistor extending from the region of said insulated gate electrode to said signal input means.