US4057460A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Plasma etching process
Assignee: EMC Corp
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Filing: 1976-11-22
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Granted: 1977-11-08
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Expires: 1996-11-22
Abstract
Abstract An improved plasma etching process. There is disclosed apparatus and method (or process) for etching patterns in metal films deposited on a semiconductor wafer. This improved process is particularly useful in the fabrication of certain semiconductor devices, such as MOS and bipolar integrated circuits and Schottky transistors (semiconductor/metal interfaces) which employ contact "fingers". The fingers are constructed from layers of metal, such as aluminum, tungsten, and titanium with aluminum being the outermost layer.
Inventors
- 👤 Arjun N. Saxena
- 👤 Courtney Hart
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 05:29
CPC Classifications
C; C23; C23F; C23F4/00; H; H10; H10P; H10P50/00; H10P50/20; H10P50/26; H10P50/264; H10P50/266; H10P50/267; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/064; Y; Y10; Y10S; Y10S438/00; Y10S438/91
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
188 words
An improved process for plasma etching of patterns in metal films, which process inhibits the build-up of space charge effects otherwise created by interactions between said plasma and the outermost one of said metal films, said process comprising the following steps in the order named: a. producing an oxidized semiconductor wafer with layers of said metal films deposited thereon, the outermost one of said layers being aluminum; b. applying photoresist to predetermined areas on the exposed surface of said aluminum layer to obtain a photoresisted wafer; c. removing other than said predetermined areas of said aluminum layer by subjecting said photoresisted wafer to a photolithographic and chemical etching process to obtain a chemically treated photoresisted wafer which exposes portions of the surface of the otherwise contiguous next metal layer lying directly beneath said other than said predetermined areas; d. subjecting said chemically treated photo-resisted wafer to a CF 4 plasma to obtain a plasma-treated wafer from which said portions of the remaining of said layers of said metal films are removed thereby; and e. removing said photoresist to obtain said plasma treated wafer having an exposed aluminum surface.
Claim 2
Dependent Claim
188 words
An improved process for plasma etching of patterns in metal films, which process inhibits the build-up of space charge effects otherwise created by interactions between said plasma and the outermost one of said metal films, said process comprising the following steps in the order named: a. producing an oxidized semiconductor wafer with layers of said metal films deposited thereon, the outermost one of said layers being aluminum; b. applying photoresist to predetermined areas on the exposed surface of said aluminum layer to obtain a photoresisted wafer; c. removing other than said predetermined areas of said aluminum layer by subjecting said photoresisted wafer to a photolithographic and chemical etching process to obtain a chemically treated photoresisted wafer which exposes portions of the surface of the otherwise contiguous next metal layer lying directly beneath said other than said predetermined areas; d. subjecting said chemically treated photo-resisted wafer to a CF 4 plasma to obtain a plasma-treated wafer from which said portions of the remaining of said layers of said metal films are removed thereby; and e. removing said photoresist to obtain said plasma treated wafer having an exposed aluminum surface.
Claim 3
Dependent Claim
22 words
The process of claim 1 and wherein said layers of metal are selected from the group consisting of aluminum, tungsten and titanium.
Claim 4
Dependent Claim
16 words
The process of claim 2 and wherein said oxidized semiconductor wafer comprises an oxidized silicon wafer.
Claim 5
Dependent Claim
48 words
The process of claim 1 and wherein said plasma subjecting step comprises: exposing said chemically treated photoresisted wafer to said CF 4 plasma with 4% oxygen under R.F. power of about 150 watts, at a pressure of about 1.0 torr, for a duration between 1 and 3 minutes.
Claim 6
Dependent Claim
126 words
A process for plasma etching a semiconductor wafer having metallic layers deposited thereon, which process inhibits the build-up of space charge effects otherwise created by interactions between said plasma and the outermost one of said metallic layers, said process comprising the steps of: a. first, insulating a portion of the outermost of said layers from etching effects of said plasma in order to reduce interference by atomic effects of said outermost of said layers with said etching effects; b. second, subjecting said wafer to said etching effects and removing said wafer therefrom after a predetermined etching result has been obtained; and c. third, removing insulation applied in said insulating step thereby exposing said portion of said outermost of said layers, along with said obtained etching result.
Claim 7
Dependent Claim
126 words
A process for plasma etching a semiconductor wafer having metallic layers deposited thereon, which process inhibits the build-up of space charge effects otherwise created by interactions between said plasma and the outermost one of said metallic layers, said process comprising the steps of: a. first, insulating a portion of the outermost of said layers from etching effects of said plasma in order to reduce interference by atomic effects of said outermost of said layers with said etching effects; b. second, subjecting said wafer to said etching effects and removing said wafer therefrom after a predetermined etching result has been obtained; and c. third, removing insulation applied in said insulating step thereby exposing said portion of said outermost of said layers, along with said obtained etching result.
Claim 8
Dependent Claim
71 words
A process as recited in claim 5 and wherein said plasma is based on a reagent selected from the fluoride group consisting of C 3 F 8 and CF 4 , said semiconductor wafer is constructed of silicon and silicon dioxide with various diffused and metalized layers, said outermost of said layers is a metal selected from the group consisting of gold, platinum, palladium, and aluminum, and said insulation is photoresist.
Claim 9
Dependent Claim
52 words
A process as recited in claim 5 further including the step, performed after said first step and before said second step, of: removing other than said insulated portion of the outermost of said layers thereby exposing some of the next otherwise contiguous one of said layers not protected by said insulated portion.
References Cited (Backward Citations)
US3795557A
Cited
US3984300A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1980-11-07 | 1981-05-09 | 1981-11-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1984-11-07 | 1985-05-09 | 1985-11-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1988-11-07 | 1989-05-09 | 1989-11-08 | $7700.00 | Window Closed / Lapsed |