Digital-analog frequency error signaling

Claim 5

The method set forth in claim 2 wherein said step a. includes the following sub-steps: a1. admitting pulses from a precise frequency source into a preset counter starting substantially at the instant each squarewave in the input signal begins, a2. starting a squarewave in said standard signal substantially at each of the last-named instants, and a3. in response to the counter reaching a predetermined number content, terminating the said admitting of said pulses and terminating the squarewave in said standard signal.

Claim 6

The method set forth in claim 3 wherein said step (b) includes the following steps: bi. applying said input signal squarewaves and the inversion of said standard signal squarewaves to a logical AND circuit to produce said first pulses during periods when A.B, and bii. applying the inversion of said input signal squarewaves and the standard signal squarewaves to a logical AND circuit to produce said second pulses during periods when A.B.

Claim 7

The method set forth in claim 3 wherein said step (c) includes: c1. applying said first and second pulses with opposite polarity efect to the input of an algebraic summing amplifier, and c2. filtering the output of the amplifier to produce a signal which varies as the time average of the difference between the durations of the first and second pulses.

Claim 8

In apparatus for producing an analog signal representing the error between a set point frequency and the variable frequency of a recurring event, the combination comprising: a. means for producing a first recurring squarewave signal having the frequency of said recurring event, with the time duration of each squarewave inversely proportional to such frequency, b. means for producing a second recurring squarewave signal with each squarewave therein beginning substantially in synchronism with the start of a squarewave in said first signal and having a predetermined, constant time duration, c. means responsive to said first and second signals for producing an output signal which varies in accordance with the sign and magnitude of the average of the difference of the two time intervals respectively during which (i) a first signal squarewave is present but a second squarewave is absent, and (ii) a second signal squarewave is present but a first signal squarewave is absent.

Claim 9

In apparatus for producing an analog signal representing the error between a set point frequency and the variable frequency of a recurring event, the combination comprising: a. means for producing a first recurring squarewave signal having the frequency of said recurring event, with the time duration of each squarewave inversely proportional to such frequency, b. means for producing a second recurring squarewave signal with each squarewave therein beginning substantially in synchronism with the start of a squarewave in said first signal and having a predetermined, constant time duration, c. means responsive to said first and second signals for producing an output signal which varies in accordance with the sign and magnitude of the average of the difference of the two time intervals respectively during which (i) a first signal squarewave is present but a second squarewave is absent, and (ii) a second signal squarewave is present but a first signal squarewave is absent.

Claim 10

In apparatus for producing an analog signal representing the error between a set point frequency and a variable frequency, the combination comprising: a. means for producing a first periodic signal A recurring at the variable frequency and having successive periods of existence which in time duration are inversely proportional to such frequency, b. means for producing a second periodic signal B having successive period of existence of predetermined constant duration, each period of existence beginning substantially in synchronism with the start of a period of said first signal, c. means for producing a first pulse whenever and so long as said first signal exists in the absence of said second signal, d. means for producing a second pulse whenever and so long as said second signal exists in the absence of said first signal, e. means responsive to said first and second pulses for producing an output signal which varies in polarity and magnitude according to the average of the diffference between the time durations of said first annd second pulses.

Claim 11

In apparatus for producing an analog signal representing the error between a set point frequency and a variable frequency, the combination comprising: a. means for producing a first periodic signal A recurring at the variable frequency and having successive periods of existence which in time duration are inversely proportional to such frequency, b. means for producing a second periodic signal B having successive period of existence of predetermined constant duration, each period of existence beginning substantially in synchronism with the start of a period of said first signal, c. means for producing a first pulse whenever and so long as said first signal exists in the absence of said second signal, d. means for producing a second pulse whenever and so long as said second signal exists in the absence of said first signal, e. means responsive to said first and second pulses for producing an output signal which varies in polarity and magnitude according to the average of the diffference between the time durations of said first annd second pulses.

Claim 12

The combination set forth in claim 7, wherein said element (b) includes: b1. a source of fixed frequency pulses, the frequency being at least several times greater than the frequency of said first signal within its expected range of variation, b2. a counter, b3. means responsive to the beginning of a period of existence of said first signal for (i) coupling said source to said counter and (ii) initiating a period of existence of said second signal, and b4. means responsive to said counter reaching a predetermined count for (i) de-coupling said source from said counter, (ii) terminating the period of existence of said second signal, and (iii) resetting the counter to a predetermined reset count.

Claim 13

The combination set forth in claim 7 wherein said elements (c) and (d) include: means for inverting said first and second signals A and B to produce signals A and B, a first logic gate receiving the signals A and B and producing said first pulses when A.B, and a second logic gate receiving the signals A and B and producing said second pulses when A.B.

Claim 14

the combination set forth in claim 9 wherein said element (e) includes: e1. a summing operational amplifier, e2. means connecting said first and second pulses as constant amplitude, opposite sense inputs to said amplifier, and e3. means for causing the output of the amplifier to vary as the time average of the difference between its two inputs.

Claim 15

The method set out in claim 2 further including: b1'. blocking the first pulse for a predetermined time interval measured from its leading edge to create a modified first pulse which appears only when the original first pulse in time width exceeds said intervals, b2'. blocking the second pulse for a predetermined time interval measured from its leading edge to create a modified second pulse which appears only when the original second pulse in time width exceeds said interval, and c'. said step (c) is carried out by utilizing said modified first and second pulses.

Claim 16

The method set forth in claim 2 and further characterized in that said step (c) is carried out by utilizing modified first and second pulses, and including the added steps of: d. utilizing said first and second pulses to measure off a predetermined time delay interval beginning with the leading edge of each first or each second pulse, e. blocking off all or the initial portion of each first and second pulse during any such delay interval to create the modified first and second pulses which are utilized in said step (c).

Claim 17

In apparatus for producing an analog signal representing the error betweeen a set point frequency and the variable frequency of a recurring event, the combination comprising: a. means for producing a first recurring squarewave signal having the frequency of said recurring event, with the time duration of each squarewave inversely proportional to such frequency, b. means responsive to said first signal for producing a second squarewave signal with the beginning of each squarewave therein substantially coincident in time with the beginning of each squarewave in the first signal, and with each squarewave therein having a predetermined, constant time duration, c. means for producing a first pulse during intervals when a second signal squarewave is present but a first signal squarewave is absent except for a predetermined delay period at the beginning of each such interval, d. means for producing a second pulse during intervals when a first signal squarewave is present but a second signal squarewave is absent except for a predetermined delay period at the beginning of each such interval, and e. means responsive to said first and second pulses for producing an output signal which varies in polarity and magnitude according to the time average of the difference between the time durations of the first and second pulses.

Claim 18

In apparatus for producing an analog signal representing the error betweeen a set point frequency and the variable frequency of a recurring event, the combination comprising: a. means for producing a first recurring squarewave signal having the frequency of said recurring event, with the time duration of each squarewave inversely proportional to such frequency, b. means responsive to said first signal for producing a second squarewave signal with the beginning of each squarewave therein substantially coincident in time with the beginning of each squarewave in the first signal, and with each squarewave therein having a predetermined, constant time duration, c. means for producing a first pulse during intervals when a second signal squarewave is present but a first signal squarewave is absent except for a predetermined delay period at the beginning of each such interval, d. means for producing a second pulse during intervals when a first signal squarewave is present but a second signal squarewave is absent except for a predetermined delay period at the beginning of each such interval, and e. means responsive to said first and second pulses for producing an output signal which varies in polarity and magnitude according to the time average of the difference between the time durations of the first and second pulses.

Claim 19

The combination set forth in claim 7 further including f. means responsive to the leading edge of either said first pulse or said second pulse for measuring off a predetermined time delay period, and g. means for blocking the response to said means (e) to said first and second pulses while said delay period is being measured off, whereby said output signal has a deadband response and varies according to the average difference between the durations of said first and second pulses as shortened by the delay period.

Claim 20

The combination set forth in claim 13 wherein: said means (f) comprises a one-shot multivibrator receiving said first and second pulses and triggered by the leading edge of either of such pulses to be placed in a set state for said predetermined delay period, and said means (g) comprise logic gates interposed between said means (c) and (d) on the one hand and said means (e) on the other hand, said gates being controlled by a signal from said multivibrator to block transmission of said pulses so long as the multivibrator is in its set state.

Claim 21

In a method of measuring off repeated precise time intervals T b , in response to each of successive stimulating input signals, which includes a. generating a recurring train of clock pulses at a precise frequency, such pulses forming a signal which periodically switches between 1 and 0 logic levels, b. gating said clock signals into a counter in response to each input signal until the counter has counted a predetermined number of its responses, said counter responding to wave front transitions of a predetermined direction (either 0 to 1 or 1 to 0) applied to its input, and wherein said method is characterized by the improvement of 1. coupling the gated clock pulses to said counter such that the first wave front of said predetermined direction appearing at the input of said counter when gating is initiated results from switching of the level in the clock pulse signal rather than from initiation of the gating action, whereby the time interval T b between the registration of the first count and the last count in said counter is always an integral multiple of the period of said clock pulses.

Claim 22

In a method of measuring off repeated precise time intervals T b , in response to each of successive stimulating input signals, which includes a. generating a recurring train of clock pulses at a precise frequency, such pulses forming a signal which periodically switches between 1 and 0 logic levels, b. gating said clock signals into a counter in response to each input signal until the counter has counted a predetermined number of its responses, said counter responding to wave front transitions of a predetermined direction (either 0 to 1 or 1 to 0) applied to its input, and wherein said method is characterized by the improvement of 1. coupling the gated clock pulses to said counter such that the first wave front of said predetermined direction appearing at the input of said counter when gating is initiated results from switching of the level in the clock pulse signal rather than from initiation of the gating action, whereby the time interval T b between the registration of the first count and the last count in said counter is always an integral multiple of the period of said clock pulses.

Claim 23

The method set forth in claim 16 further characterized by the step of: producing a time interval signal which begins when the first count is registered in said counter and ends when the last count is registered in said counter.

Claim 24

The method set forth in claim 16 further characterized by the steps of: terminating the gating when said counter reaches a predetermined count state, and resetting the counter to a predetermined reset state prior to the next initiation of the gating.

Claim 25

In a method of measuring off a precise time interval in response to a stimulating input signal, which includes: a. generating a recurring train of clock pulses at a precise frequency, such pulses forming a signal which periodically switches between 0 and 1 logic levels, b. opening a gate to couple said clock pulses into a counter in response to each input signal, said counter responding and registering a count in response to a wave front transition of a predetermined direction (either 0 to 1 or 1 to 0) at the output of said gate, c. terminating the gating in response to the counter having registered a predetermined number of counts, and wherein said method is characterized by the improvement of: coupling the gated clock pulses to said counter such that the first wave front of said predetermined direction, appearing at the output of said gate upon initiation of gating action, results from a switching of the level in the clock pulse signal, whereby the interval between the registration of the first and the last count in said counter is an integral multiple of the period of said clock pulses.

Claim 26

In a method of measuring off a precise time interval in response to a stimulating input signal, which includes: a. generating a recurring train of clock pulses at a precise frequency, such pulses forming a signal which periodically switches between 0 and 1 logic levels, b. opening a gate to couple said clock pulses into a counter in response to each input signal, said counter responding and registering a count in response to a wave front transition of a predetermined direction (either 0 to 1 or 1 to 0) at the output of said gate, c. terminating the gating in response to the counter having registered a predetermined number of counts, and wherein said method is characterized by the improvement of: coupling the gated clock pulses to said counter such that the first wave front of said predetermined direction, appearing at the output of said gate upon initiation of gating action, results from a switching of the level in the clock pulse signal, whereby the interval between the registration of the first and the last count in said counter is an integral multiple of the period of said clock pulses.

Claim 27

In a method off precise time intervals in response to successive stimulating input signals, which includes a. generating a recurring train of clock pulses at a precise frequency, such pulses forming a signal which periodically switches between 0 and 1 logic levels, b. initiating the enablement of a gate to couple said clock signals into a counter in response to each input signal, and continuing such gating until the counter has registered a predetermined number of counts, b1. said counter registering a count in response to a level transition in a predetermined direction (either 0 to 1 or 1 to 0) at the output of said gate, and said method being characterized in that 1. the step (b) of initiating the enablement of said gate is carried out to produce either no response or a level transition opposite to said predetermined direction if it occurs when said clock pulse signal exits at either a 1 or a 0 level.

Claim 28

In a method off precise time intervals in response to successive stimulating input signals, which includes a. generating a recurring train of clock pulses at a precise frequency, such pulses forming a signal which periodically switches between 0 and 1 logic levels, b. initiating the enablement of a gate to couple said clock signals into a counter in response to each input signal, and continuing such gating until the counter has registered a predetermined number of counts, b1. said counter registering a count in response to a level transition in a predetermined direction (either 0 to 1 or 1 to 0) at the output of said gate, and said method being characterized in that 1. the step (b) of initiating the enablement of said gate is carried out to produce either no response or a level transition opposite to said predetermined direction if it occurs when said clock pulse signal exits at either a 1 or a 0 level.

Claim 29

In a system having a. a precision frequency source of clock pulses which form a signal periodically switching between 1 and 0 logic levels, b. a counter adapted to respond to and count wave fronts of a predetermined direction (0 to 1 or 1 to 0) applied to its input, c. gate means, enabled by each one of a succession of input signals which arrive with lower frequency and in random, non-synchronized relation to said clock pulses, for transmitting said clock pulses to the input of said counter, d. means responsive to the counter reaching a predetermined count state N c for disabling said gate means, and e. means for resetting said counter to a predetermined reset state N r prior to the next enablement of said gate means, whereby the time interval T b measured off between the start and the end of each counting cycle is approximately constant and determined by the frequency of said source and the difference (N c -- N r ) between said predetermined count and reset states, the improvement comprising means responsive to each input signal for enabling said gate means at an instant such that the input to said counter next undergoes a wave front transition of said predetermined direction only as a consequence of a level switching in the clock pulse signal, whereby said time interval T b is precisely constant for all counter cycles and is always an integral multiple of the period of said clock pulses.

Claim 30

In a system having a. a precision frequency source of clock pulses which form a signal periodically switching between 1 and 0 logic levels, b. a counter adapted to respond to and count wave fronts of a predetermined direction (0 to 1 or 1 to 0) applied to its input, c. gate means, enabled by each one of a succession of input signals which arrive with lower frequency and in random, non-synchronized relation to said clock pulses, for transmitting said clock pulses to the input of said counter, d. means responsive to the counter reaching a predetermined count state N c for disabling said gate means, and e. means for resetting said counter to a predetermined reset state N r prior to the next enablement of said gate means, whereby the time interval T b measured off between the start and the end of each counting cycle is approximately constant and determined by the frequency of said source and the difference (N c -- N r ) between said predetermined count and reset states, the improvement comprising means responsive to each input signal for enabling said gate means at an instant such that the input to said counter next undergoes a wave front transition of said predetermined direction only as a consequence of a level switching in the clock pulse signal, whereby said time interval T b is precisely constant for all counter cycles and is always an integral multiple of the period of said clock pulses.

Claim 31

In a precise standard time interval generator having a. a precision frequency source of clock pulses which form a signal periodically switching between 1 and 0 logic levels, b. a counter adapted to respond to and count wave fronts of a predetermined direction (either 0 to 1 or 1 to 0) applied to its input, c. means including a gate for transmitting said clock pulse signal to the input of the counter, said gate being enabled or disabled by a 1 or 0 level in a control signal applied thereto, d. means responsive to the counter reaching a predetermined count for switching said control signal from a 1 to a 0 level and disabling said gate, and e. means responsive to an input signal, which may appear in random, non-synchronized relation to said clock pulses, for switching said control signal to a 1 level to enable said gate, the improvement characterized in that said means (c) includes means for causing the first signal transition of said predetermined direction at the input of said counter following enablement of said gate to result from a level switching transition in the clock pulse signal.

Claim 32

In a precise standard time interval generator having a. a precision frequency source of clock pulses which form a signal periodically switching between 1 and 0 logic levels, b. a counter adapted to respond to and count wave fronts of a predetermined direction (either 0 to 1 or 1 to 0) applied to its input, c. means including a gate for transmitting said clock pulse signal to the input of the counter, said gate being enabled or disabled by a 1 or 0 level in a control signal applied thereto, d. means responsive to the counter reaching a predetermined count for switching said control signal from a 1 to a 0 level and disabling said gate, and e. means responsive to an input signal, which may appear in random, non-synchronized relation to said clock pulses, for switching said control signal to a 1 level to enable said gate, the improvement characterized in that said means (c) includes means for causing the first signal transition of said predetermined direction at the input of said counter following enablement of said gate to result from a level switching transition in the clock pulse signal.

Claim 33

In a system for measuring off a precise time interval each time a stimulating input signal is received, such system having a. a precision frequency source of clock pulses which form a signal switching between 0 and 1 logic levels, b. a counter adapted to respond to a wave front of predetermined direction (either 0 to 1 or 1 to 0). c. gate means receiving as a primary input said clock pulses and having its output coupled to said counter, d. a bistate device coupled to said gate means to enable and disable the latter when in the set or reset state, respectively, e. means responsive to each of successive input signals, which are random and non-synchronized in relation to said clock pulses, for setting said bistate device, and f. means responsive to the counter reaching a predetermined count state for (i) resetting said bistate device, and (ii) resetting the counter to a predetermined reset state, the improvement comprising means for coupling the outpt of said gate means to the input of said counter such that the first wave front of said predetermined direction applied to the counter input following each enablement of said gate means is created in consequence of a level switching of the clock pulses signal.

Claim 34

In a system for measuring off a precise time interval each time a stimulating input signal is received, such system having a. a precision frequency source of clock pulses which form a signal switching between 0 and 1 logic levels, b. a counter adapted to respond to a wave front of predetermined direction (either 0 to 1 or 1 to 0). c. gate means receiving as a primary input said clock pulses and having its output coupled to said counter, d. a bistate device coupled to said gate means to enable and disable the latter when in the set or reset state, respectively, e. means responsive to each of successive input signals, which are random and non-synchronized in relation to said clock pulses, for setting said bistate device, and f. means responsive to the counter reaching a predetermined count state for (i) resetting said bistate device, and (ii) resetting the counter to a predetermined reset state, the improvement comprising means for coupling the outpt of said gate means to the input of said counter such that the first wave front of said predetermined direction applied to the counter input following each enablement of said gate means is created in consequence of a level switching of the clock pulses signal.