US4049478A
Expired / Lapsed
US
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Utilization of an arsenic diffused emitter in the fabrication of a high performance semiconductor device
Assignee: International Business Machines Corp
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Filing: 1975-12-08
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Granted: 1977-09-20
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Expires: 1995-12-08
Abstract
Abstract A substantially square N-type impurity distribution profile in a silicon substrate produces much superior dc and ac characteristics in PN junction devices than can be expected from the usual phosphorus distribution profile. Such a square profile is obtained by diffusion of arsenic in the silicon substrate. The sharper impurity gradient allows a relatively low surface concentration to be used for the device. This lower surface concentration relieves precipitation and dislocation problems.
Inventors
- 👤 Hitendra N. Ghosh
- 👤 Madhukar L. Joshi
- 👤 Tsu-Hsing Yeh
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 09:07
CPC Classifications
H; H10; H10P; H10P32/00; H10D; H10D62/00; H10D62/10; H10D62/13; H10D62/133; H10P32/10; H10P32/12; H10P32/17; H10P32/171; Y; Y10; Y10S; Y10S148/00; Y10S148/04; Y10S148/041; Y10S148/085; Y10S148/157
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
78 words
The mehtod of forming a high performance PN semiconductor device comprising: introducing a P-type impurity into a silicon semi-conductor body so as to provide a surface concentration level of greater than about 10 19 atoms per cm 3 ; diffusing arsenic within said P-type region so as to provide a surface concentration level of arsenic of greater than about 10 20 per cm 3 ; continuing said diffusion step until said arsenic forms a substantially square impurity distribution.
Claim 2
Dependent Claim
78 words
The mehtod of forming a high performance PN semiconductor device comprising: introducing a P-type impurity into a silicon semi-conductor body so as to provide a surface concentration level of greater than about 10 19 atoms per cm 3 ; diffusing arsenic within said P-type region so as to provide a surface concentration level of arsenic of greater than about 10 20 per cm 3 ; continuing said diffusion step until said arsenic forms a substantially square impurity distribution.
Claim 3
Dependent Claim
16 words
The method of forming a semiconductor device of claim 1 wherein said P-type impurity is boron.
Claim 4
Dependent Claim
48 words
The method as in claim 1 wherein said diffusion step comprises: placing said devices into a diffusion furnace heated to around 1000° C. to 1200° C.; and providing an arsenic capsule source, having an impurity of around 10 21 atoms/cm 3 available in said capsule, in said furnace.
Claim 5
Dependent Claim
16 words
The method as in claim 3 wherein said diffusing step continues for at least 1 hour.
References Cited (Backward Citations)
US3477886A
Cited
US3484313A
Cited
US3455748A
Cited
US3707410A
Cited
US3852127A
Cited
US3638081A
Cited
US3600241A
Cited
US3607468A
Cited
US3713908A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1980-09-19 | 1981-03-21 | 1981-09-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1984-09-19 | 1985-03-21 | 1985-09-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1988-09-19 | 1989-03-21 | 1989-09-20 | $7700.00 | Window Closed / Lapsed |