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US4048581A Expired / Lapsed US ⏱️ 0.0 years remaining

Oscillator frequency control loop

Assignee: Telefonaktiebolaget LM Ericsson AB
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Filing: 1976-05-26
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Granted: 1977-09-13
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Expires: 1996-05-26
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Abstract

Abstract In an oscillator circuit controlled by a reference frequency a voltage regulated oscillator is controlled by the output voltage from digital-to-analog converter whose digital input is obtained from an up/down counter. The counter is controlled by the output from a frequency difference detector which compares the output of the voltage control oscillator and the reference frequency. A threshold circuit is connected between the frequency difference detector and the activation and up/down control inputs of the counter so that the counter is activated only when the frequency difference exceeds a predetermined amount.

Inventors

  • 👤 Bertil Lyberg

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 22:02
CPC Classifications
H; H03; H03L; H03L7/00; H03L7/06; H03L7/08; H03L7/085; H03L7/093; H03L7/16; H03L7/18

Claims Analysis

Total Claims: 3
Claim 1
Independent Claim 199 words
An oscillator device comprising a voltage controlled oscillator having an output and a control input, a low-pass filter, a digital to analog converter having digital inputs and an analog output connected to said oscillator control input through said low-pass filter, a bidirectional counting means having digital outputs connected to the digital inputs on said digital-to-analog converter, said counting means comprising a clock pulse source, a clock pulse input connected to said pulse source, an activation input and an up/down control input for controlling the counting direction, frequency comparator means for comparing the frequency of a signal derived from the output of said voltage controlled oscillator and the frequency of a reference signal, said frequency comparator means generating a difference signal having an amplitude and sign which represent the difference between said signal and said reference signal, threshold means and sign indicating means sampling said difference signal for generating control signals to said activation input and said up/down control input respectively for enabling said clock pulse source to step said counting means in a compensating direction as the difference signal falls outside predetermined thresholds, and means for stopping the counter when the difference signal passes through a zero difference value.
Claim 2
Dependent Claim 199 words
An oscillator device comprising a voltage controlled oscillator having an output and a control input, a low-pass filter, a digital to analog converter having digital inputs and an analog output connected to said oscillator control input through said low-pass filter, a bidirectional counting means having digital outputs connected to the digital inputs on said digital-to-analog converter, said counting means comprising a clock pulse source, a clock pulse input connected to said pulse source, an activation input and an up/down control input for controlling the counting direction, frequency comparator means for comparing the frequency of a signal derived from the output of said voltage controlled oscillator and the frequency of a reference signal, said frequency comparator means generating a difference signal having an amplitude and sign which represent the difference between said signal and said reference signal, threshold means and sign indicating means sampling said difference signal for generating control signals to said activation input and said up/down control input respectively for enabling said clock pulse source to step said counting means in a compensating direction as the difference signal falls outside predetermined thresholds, and means for stopping the counter when the difference signal passes through a zero difference value.
Claim 3
Dependent Claim 56 words
An oscillator as claimed in claim 1 where said threshold means comprises trigger means connected to said activating input, amplitude sensing circuits for detecting when the difference signal exceeds an upper and a lower threshold for setting said trigger means and means for resetting said trigger means when the polarity of the difference signal changes sign.

References Cited (Backward Citations)

US3484712A Cited
US3551826A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1980-09-12 1981-03-14 1981-09-13 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1984-09-12 1985-03-14 1985-09-13 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1988-09-12 1989-03-14 1989-09-13 $7700.00 Window Closed / Lapsed

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