US4048350A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device having reduced surface leakage and methods of manufacture
Assignee: International Business Machines Corp
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Filing: 1975-09-19
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Granted: 1977-09-13
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Expires: 1995-09-19
Abstract
Abstract Surface leakage paths on bipolar and FET transistors may be significantly reduced by the presence of a fixed charge in an insulating layer adhered to a semiconductor wafer. The fixed charge consists of ions which are introduced into the insulating layer after all high-temperature process treatments have been performed on the wafer. The ions are introduced into the insulating layer by (1) immersing the wafer in a solution of a suitable metal salt; (2) sandwiching the wafers between carefully cleaned non-immersed wafers and (3) driving the ions to the insulating layer-wafer interface by heating the wafer stacks in a furnace at a preselected temperature. The effective charge level embedded in the insulating layer is sufficient to protect against inversion of the wafer surface due to conductors on the insulating layer having negative potentials exceeding 10 volts and overlying the stored-charge area.
Inventors
- 👤 Reinhard Glang
- 👤 Stanley Irwin Raider
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 06:41
CPC Classifications
H; H10; H10P; H10P32/00; H10P32/20; H10D; H10D62/00; H10D62/10; H10D62/102; H10D62/112; Y; Y10; Y10S; Y10S438/00; Y10S438/91
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
97 words
A process for fabricating a semiconductor comprising steps of a. forming an insulating layer on a semiconductor substrate, b. forming a layer of positive ions on the surface of the insulating layer, c. covering the insulating layer with a blank wafer to prevent gaseous escape of the positive ions from the insulating layer, and d. driving the positive ions toward the substrate/insulating layer interface to achieve a positive charge level exceeding 2 × 10 11 ions/cm 2 to prevent the formation of surface leakage paths on the substrate by potentials across the insulating layer exceeding 10 volts.
Claim 2
Dependent Claim
97 words
A process for fabricating a semiconductor comprising steps of a. forming an insulating layer on a semiconductor substrate, b. forming a layer of positive ions on the surface of the insulating layer, c. covering the insulating layer with a blank wafer to prevent gaseous escape of the positive ions from the insulating layer, and d. driving the positive ions toward the substrate/insulating layer interface to achieve a positive charge level exceeding 2 × 10 11 ions/cm 2 to prevent the formation of surface leakage paths on the substrate by potentials across the insulating layer exceeding 10 volts.
Claim 3
Dependent Claim
28 words
The process of claim 1 wherein the layer of positive ions is formed on the surface by immersing the substrate in an aqueous solution of large alkali ions.
Claim 4
Dependent Claim
27 words
The process of claim 1 wherein the layer of positive ions is formed on the surface by evaporation of a alkali halide salt in a vacuum system.
Claim 5
Dependent Claim
23 words
The process of claim 1 wherein the layer of positive ions is formed on the surface by ion implantation of large alkali ions.
Claim 6
Dependent Claim
34 words
The process of claim 1 wherein the layer of positive ions on the surface of the insulating layer is taken from the group consisting of cesium chloride, magnesium chloride, barium nitride, and rubidium chloride.
Claim 7
Dependent Claim
38 words
The process of claim 5 wherein the positive ions are driven through the insulating layer by heating the substrate at a temperature in the range of 400°-900° C for a time period in the range of 5-60° minutes.
Claim 8
Dependent Claim
36 words
The process of claim 6 wherein the insulating layer is etched to remove surface films which serve as ion diffusion barriers prior to forming a layer of positive ions on the surface of the insulating layer.
Claim 9
Dependent Claim
24 words
The process of claim 7 wherein the semiconductor substrate is of silicon and the insulating layer is an oxide having a thickness exceeding 2000A.
Claim 10
Dependent Claim
37 words
The process of claim 1 wherein the semiconductor substrates having a layer of positive ions on the surface of the insulating layer are sandwiched between semiconductor wafers prior to driving the positive ions through the insulating layer.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1980-09-12 | 1981-03-14 | 1981-09-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1984-09-12 | 1985-03-14 | 1985-09-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1988-09-12 | 1989-03-14 | 1989-09-13 | $7700.00 | Window Closed / Lapsed |