Method of fabrication of insulated gate field effect semiconductor devices

Claim 2

A process for the fabrication of an insulated gate field effect transistor comprising the steps of: forming an adherent, apertured mask of silicon oxide on a monocrystalline silicon body of one conductivity type, said mask having an oxygen-impermeable film on selected areas thereof including a gate area and areas where ohmic contacts are to be formed; exposing the masked body to a suitable dopant for inducing the opposite conductivity type in the apertured surface regions of said body; exposing the masked body to an oxidizing atmosphere, whereby the silicon surface is selectively oxidized at locations not protected by said oxygen-impermeable film; selectively removing the oxide and oxygen-impermeable films fromthe ohmic contact areas; and depositing and patterning a conductor film on the structure to form a gate electrode on said remaining oxygen-impermeable film, in combination with source and drain electrodes extending through the oxide in contact with said regions of opposite conductivity type.

Claim 3

A process as defined by claim 1 wherein said oxygen-impermeable film comprises silicon nitride.

Claim 4

A process as defined by claim 1 wherein said silicon is on n-type conductivity and said dopant is boron.

Claim 5

A method as defined by claim 1 wherein said silicon is of p-type conductivity and said dopant is phosphorus or antimony.

Claim 6

A method as defined by claim 1 wherein said conductor film is silicon.

Claim 7

A process for the fabrication of an insulated gate field effect transistor comprising the steps of: forming an adherent, apertured diffusion mask of silicon oxide and silicon nitride on a monocrystalline silicon body of one conductivity type, including a gate location and locations where ohmic contacts are to be made; exposing the masked body to a suitable dopant at elevated temperature for a time sufficient to convert the apertured surface regions of the body to opposite conductivity type; removing the nitride from selected portions of said diffusion mask; exposing the surface to oxidation conditions for a time sufficient to complete the diffusion of said dopant into a subsurface region of said body, and concurrently to form a relatively thick silicon oxide pattern on the body surface except for regions where the nitride remains; selectively etching to remove the nitride and oxide at ohmic contact locations to expose a portion of the diffused regions; and forming a conductor pattern extending in contact with the diffused regions, in combination with a gate electrode on the remaining nitride.

Claim 8

A process for the fabrication of an insulated gate field effect transistor comprising the steps of: forming an adherent, apertured diffusion mask of silicon oxide and silicon nitride on a monocrystalline silicon body of one conductivity type, including a gate location and locations where ohmic contacts are to be made; exposing the masked body to a suitable dopant at elevated temperature for a time sufficient to convert the apertured surface regions of the body to opposite conductivity type; removing the nitride from selected portions of said diffusion mask; exposing the surface to oxidation conditions for a time sufficient to complete the diffusion of said dopant into a subsurface region of said body, and concurrently to form a relatively thick silicon oxide pattern on the body surface except for regions where the nitride remains; selectively etching to remove the nitride and oxide at ohmic contact locations to expose a portion of the diffused regions; and forming a conductor pattern extending in contact with the diffused regions, in combination with a gate electrode on the remaining nitride.

Claim 9

A process as defined by claim 6 wherein the oxide layer beneath the nitride layer has a thickness of 0.05 - 0.25 microns and said relatively thick silicon oxide pattern has a thickness of 0.5 - 2.0 microns.

Claim 10

A process as defined by claim 6 wherein said silicon nitride has a thickness of at least 600 angstroms.