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US4037135A Expired / Lapsed US ⏱️ 0.0 years remaining

Solid state timer-stepper with soft switch-on and switch-off load control

Assignee: ELI BRIDGE Co
•
Filing: 1976-06-03
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Granted: 1977-07-19
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Expires: 1996-06-03
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Abstract

Abstract A timer-stepper, which is particularly applicable to light chasers for producing a special "ripple" lighting effect and increasing bulb and logic circuit component lives, having photoncoupler phase-shifting networks in the gate circuits of switching triacs for "softness" during switching and for isolating the logic of said timer-stepper from A.C. line or switching transients.

Inventors

  • 👤 William E. Novey

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 19:26
CPC Classifications
H; H05; H05B; H05B39/00; H05B39/02

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 112 words
In a solid-state timer-stepper of the class wherein a pulse generator provides a train of incoming pulses to a counter which puts out BCD signals to a decoder for conversion into a digital format suitable for sequentially switching triacs arranged in multiple-segment load circuits, the combination with the gate circuits of said triacs of phase-shift network means having inputs electrically connected to the output from said decoder and outputs electrically connected to the gate circuits of said triacs for gating said triacs at increasing phase angles after application of the output from the decoder, and decreasing phase angles after removal of the output therefrom; whereby soft switching of the triacs is simulated.
Claim 2
Dependent Claim 112 words
In a solid-state timer-stepper of the class wherein a pulse generator provides a train of incoming pulses to a counter which puts out BCD signals to a decoder for conversion into a digital format suitable for sequentially switching triacs arranged in multiple-segment load circuits, the combination with the gate circuits of said triacs of phase-shift network means having inputs electrically connected to the output from said decoder and outputs electrically connected to the gate circuits of said triacs for gating said triacs at increasing phase angles after application of the output from the decoder, and decreasing phase angles after removal of the output therefrom; whereby soft switching of the triacs is simulated.
Claim 3
Dependent Claim 70 words
In a solid-state timer-stepper, as set forth in claim 1, wherein the phase-shift network means comprises a photoncoupler having a diode electrically connected to the input to said phase-shift network means, and a photocell optically coupled with said diode and electrically connected to the output from said phase-shift network means having logarithmically decremental "rise" and "decay" internal resistance characteristics after application or removal of light, respectively, from the diode thereof.
Claim 4
Dependent Claim 82 words
In a solid-state timer-stepper, as set forth in claim 2, wherein the "rise" characteristic of the internal resistance of the photocell at time zero after application of light from the diode ranges from 1,000-1,500,000 ohms, and the "rise" internal resistance thereof after more than 10 milliseconds thereafter ranges from 10-10,000 ohms, and the first logarithmic decrement of resistance versus time after application of input ranges from 0.50-1.50 sec. - 1 and the second logarithmic decrement thereof ranges from 0.05-0.20 sec..sup. -2 .
Claim 5
Dependent Claim 81 words
In a solid-state timer-stepper, as set forth in claim 2, wherein the "decay" characteristic of the internal resistance of the photocell at time zero after removal of light from the diode ranges from 10-10,000 ohms, and the "decay" internal resistance thereof after more than 240 seconds thereafter ranges from 500,000-15,000,000 ohms, and the first logarithmic increment of resistance versus time after removal of input ranges from 0.01-0.06 sec..sup. -1 and the second logarithmic increment thereof ranges from 0.00005-0.00600 sec..sup. -2 .
Claim 6
Dependent Claim 294 words
In a solid-state timer-stepper including a control logic D.C. power supply and comprising a single phase, 120-volt A.C. power source; a clock timer circuit operationally connecting to the D.C. regulated control logic power supply of the power supply circuit a counter circuit operationally connected to the output terminal from said clock; a BCD decoder operationally connecting to output from said counter a phase shift network comprising first, second, third, fourth and fifth VACTEC LED/Cds-cell VTL 5c2 photon-couplers each having its Number 2 LED anode terminal operationally connecting through seventh, eighth, ninth, 10th and 11th resistors, respectively, to the 5-volt (D.C) regulated control logic power supply, and each having its Number 1 LED cathode terminals operationally connecting to each of the output terminals, respectively, from the decoder circuit; 12th, 13th, 14th, 15th and 16th resistors, respectively, operationally connecting at one end to Number 3 terminal of each of the CdS cells of the photoncouplers, respectively; a lamp driver circuit comprising first, second, third, fourth and fifth 300-volt, 8 amp triacs each having its main terminal 1 operationally connecting to A.C. neutral terminal of the 120-volt (A.C.) power source; a lamp display array comprising first, second, third, fourth and fifth lamps each having its input terminal operationally connecting to A.C. "hot" terminal of the 120-volt (A.C.) power source and each having its other terminal operationally connecting to each of the main terminals 2 of said triacs, respectively, and having triac gating terminals on each of said triacs operationally connecting to the other end of each of the resistors, respectively, and having Number 5 terminals of each of the CdS-cells of photoncouplers in the phase-shift network operationally connecting to the other terminal of the first, second, third, fourth and fifth lamps of the lamp display array, respectively.
Claim 7
Dependent Claim 294 words
In a solid-state timer-stepper including a control logic D.C. power supply and comprising a single phase, 120-volt A.C. power source; a clock timer circuit operationally connecting to the D.C. regulated control logic power supply of the power supply circuit a counter circuit operationally connected to the output terminal from said clock; a BCD decoder operationally connecting to output from said counter a phase shift network comprising first, second, third, fourth and fifth VACTEC LED/Cds-cell VTL 5c2 photon-couplers each having its Number 2 LED anode terminal operationally connecting through seventh, eighth, ninth, 10th and 11th resistors, respectively, to the 5-volt (D.C) regulated control logic power supply, and each having its Number 1 LED cathode terminals operationally connecting to each of the output terminals, respectively, from the decoder circuit; 12th, 13th, 14th, 15th and 16th resistors, respectively, operationally connecting at one end to Number 3 terminal of each of the CdS cells of the photoncouplers, respectively; a lamp driver circuit comprising first, second, third, fourth and fifth 300-volt, 8 amp triacs each having its main terminal 1 operationally connecting to A.C. neutral terminal of the 120-volt (A.C.) power source; a lamp display array comprising first, second, third, fourth and fifth lamps each having its input terminal operationally connecting to A.C. "hot" terminal of the 120-volt (A.C.) power source and each having its other terminal operationally connecting to each of the main terminals 2 of said triacs, respectively, and having triac gating terminals on each of said triacs operationally connecting to the other end of each of the resistors, respectively, and having Number 5 terminals of each of the CdS-cells of photoncouplers in the phase-shift network operationally connecting to the other terminal of the first, second, third, fourth and fifth lamps of the lamp display array, respectively.

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1980-07-18 1981-01-17 1981-07-19 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1984-07-18 1985-01-17 1985-07-19 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1988-07-18 1989-01-17 1989-07-19 $7700.00 Window Closed / Lapsed

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