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US4037095A Expired / Lapsed US ⏱️ 0.0 years remaining

Signal stabilizing circuits

Assignee: The Broken Hill Proprietary Company Pty Ltd
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Filing: 1975-09-17
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Granted: 1977-07-19
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Expires: 1995-09-17
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Abstract

Abstract This specification discloses signal processing circuits of the type suitable for use in removing unwanted cyclic and/or random components from a d.c. signal such as signals of the type produced by load transducers in weighing systems. In the preferred forms, the processing circuit comprises means for determining the period of oscillation of the composite signal, means for integrating the composite signal over one period of the composite signal, and means for dividing the integrated composite signal by the period thereof to produce the average of the composite signal over one period. Several forms of circuit including such means are disclosed including one comprising a low pass filter interposed between the signal source and the phase locked loop, a voltage to frequency converter connected to the output of the filter and having its output connected to a digital integrator circuit controlled by the phase locked loop to integrate the signal over one period, a digital divider circuit connected to the output of the integrator and a time-base integrator connected to the divider and controlled by the phase locked loop to divide the integrator output by the period of the signal to produce a digital average signal, and a digital to analogue converter for converting the digital average signal to analogue form.

Inventors

  • 👤 Edward Morris Howells
  • 👤 Cheung Yun Chan

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-06 06:15
CPC Classifications
G; G01; G01G; G01G19/00; G01G19/14; G01G19/18

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 82 words
A signal processing circuit for removing unwanted cyclic and/or random components from a composite d.c./cyclic signal, said circuit comprising means for connecting a source of said composite signal to: (a) means for determining the period of the signal; and (b) means for integrating said signal over its period; and means joined to the period determining means and to the integrating means for dividing the integrated composite signal by the period thereof to produce the average of the composite signal over one period.
Claim 2
Dependent Claim 82 words
A signal processing circuit for removing unwanted cyclic and/or random components from a composite d.c./cyclic signal, said circuit comprising means for connecting a source of said composite signal to: (a) means for determining the period of the signal; and (b) means for integrating said signal over its period; and means joined to the period determining means and to the integrating means for dividing the integrated composite signal by the period thereof to produce the average of the composite signal over one period.
Claim 3
Dependent Claim 22 words
The circuit of claim 1, wherein the means for determining the period of the signal comprises a phase locked loop frequency discriminator.
Claim 4
Dependent Claim 135 words
The circuit of claim 2, wherein said connecting means includes a low pass filter interposed between the signal source and both the frequency discriminator and the integrating means; wherein said integrating means comprises a voltage to frequency converter connected to an output of the filter and a digital integrator circuit joined to said converter, said integrator being connected to an output of the frequency discriminator; and wherein said dividing means comprises a digital divider circuit joined to the integrating means via an output of the integrator circuit and joined to the period determining means via an output of a time-base integrator connected to said output of the frequency discriminator for producing a digital average signal; and a digital to analogue converter connected to said divider circuit for converting the digital average signal to analogue form.
Claim 5
Dependent Claim 18 words
The circuit of claim 1, wherein said source comprises a load cell output in a crane weighing system.
Claim 6
Dependent Claim 25 words
The circuit of claim 4, wherein said period determining means comprises a phase locked loop frequency discriminator; and wherein said integrating means comprises an integrator.
Claim 7
Dependent Claim 18 words
The circuit of claim 3, wherein said source comprises a load cell output in a crane weighing system.
Claim 8
Dependent Claim 54 words
The circuit of claim 2, wherein said integrating means comprises: an analogue integrator circuit which includes an integrator connected to said source, an integrator connected to a reference voltage source, and control logic connected to said integrators and to said frequency discriminator; and wherein said dividing means is connected to outputs of said integrators.
Claim 9
Dependent Claim 26 words
The circuit of claim 2, wherein said integrating means comprises a circuit joined to said source for integrating the signal by the dual slope integration method.
Claim 10
Dependent Claim 27 words
The circuit of claim 2, wherein said integrating means comprises a circuit joined to said source for integrating the signal by the digital fast response integration method.

References Cited (Backward Citations)

US3192535A Cited
US3307019A Cited
US3334305A Cited
US3446299A Cited
US3771167A Cited
US3693100A Cited
US3829780A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1980-07-18 1981-01-17 1981-07-19 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1984-07-18 1985-01-17 1985-07-19 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1988-07-18 1989-01-17 1989-07-19 $7700.00 Window Closed / Lapsed

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