Sine-to-square wave converter

Claim 2

A circuit for producing a square wave output signal, the circuit comprising: first terminal means adapted to receive an alternating current signal; second terminal means adapted to receive a reference signal; programmable unijunction transistor means having gate, anode, and cathode electrodes; first impedance means connected to the anode and to the first terminal means for limiting current flow to the anode; second impedance means connected to the gate and to the second terminal means; capacitor means connected between the anode and the cathode; and means for deriving an output signal from the gate.

Claim 3

The circuit of claim 1 wherein the first impedance means and the capacitor means comprise filtering means for filtering the alternating current signal.

Claim 4

The circuit of claim 2 wherein the first impedance means comprise a resistor.

Claim 5

The circuit of claim 3 wherein the resistor and the capacitor means have a time constant which provides filtering of the alternating current signal without causing significant phase shift of the alternating current signal.

Claim 6

The circuit of claim 1 wherein the means for deriving an output signal comprises buffer means.

Claim 7

The circuit of claim 5 wherein the buffer means comprise a CMOS inverter.

Claim 8

A circuit for producing a square wave output signal, the circuit comprising: first terminal means adapted to receive an alternating current signal; second terminal means adapted to receive a reference signal; programmable unijunction transistor means having gate, anode, and cathode electrodes; current limiting means connected to the anode and to the first terminal means for limiting current flow to the anode; filtering means connected to the anode for filtering the alternating current signal; impedance means connected to the gate and to the second terminal means; and means for deriving an output signal from the gate.

Claim 9

A circuit for producing a square wave output signal, the circuit comprising: first terminal means adapted to receive an alternating current signal; second terminal means adapted to receive a reference signal; programmable unijunction transistor means having gate, anode, and cathode electrodes; current limiting means connected to the anode and to the first terminal means for limiting current flow to the anode; filtering means connected to the anode for filtering the alternating current signal; impedance means connected to the gate and to the second terminal means; and means for deriving an output signal from the gate.

Claim 10

The circuit of claim 7 wherein the means for deriving an output signal comprises buffer means.

Claim 11

The circuit of claim 7 wherein the filtering means comprise an RC circuit.

Claim 12

The circuit of claim 9 wherein the capacitor of the RC circuit is connected between the anode and the cathode and wherein the resistor of the RC circuit is connected between the first terminal and the anode to form the current limiting means.