Patent US2584387A successfully refreshed from Google Patents.
US4032894A
Expired / Lapsed
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Logic array with enhanced flexibility
Assignee: International Business Machines Corp
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Filing: 1976-06-01
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Granted: 1977-06-28
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Expires: 1996-06-01
Abstract
Abstract A single-chip programmable logic array (PLA) in which the AND (search) array outputs are coupled to the OR (readout) array through a NOT array of selectable on-chip inverters. Provision is also made for selectable interconnection of inverted or non-inverted NOT array outputs to each other.
Inventors
- 👤 Robert Russell Williams
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 17:11
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/173; H03K19/177; H03K19/17704; H03K19/17708; H03K19/17716
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
108 words
In a programmable logic array chip including a search array for providing a set of search signals on respective ones of a plurality of output columns, said output columns being selectively connectable to a plurality of input rows, and a read array for providing a set of output signals on a plurality of output rows, said output rows being selectively connectable to a plurality of input columns, the improvement comprising: a complement array having means for providing both true and complement forms of each of said search signals, and having means for selectively coupling one of said forms of each of said search signals to said input columns.
Claim 2
Dependent Claim
108 words
In a programmable logic array chip including a search array for providing a set of search signals on respective ones of a plurality of output columns, said output columns being selectively connectable to a plurality of input rows, and a read array for providing a set of output signals on a plurality of output rows, said output rows being selectively connectable to a plurality of input columns, the improvement comprising: a complement array having means for providing both true and complement forms of each of said search signals, and having means for selectively coupling one of said forms of each of said search signals to said input columns.
Claim 3
Dependent Claim
42 words
The programmable logic array of claim 1, wherein said complement array includes a plurality of inverters, each having an input coupled to one of said output columns, and each having an output providing said complement form of one of said search signals.
Claim 4
Dependent Claim
37 words
The programmable logic array of claim 2, wherein said selective coupling means comprises a plurality of conductive links, each of said links being selectively connectable to the input and to the output of one of said inverters.
Claim 5
Dependent Claim
44 words
The programmable logic array of claim 1, wherein said search array includes a plurality of gates having differential circuits, and wherein said complement array includes two connections to each of said stages, for providing said true and complement forms of each said search signal.
Claim 6
Dependent Claim
22 words
The programmable logic array of claim 1, further comprising means for selectively interconnecting adjacent ones of said input columns to each other.
Claim 7
Dependent Claim
30 words
The programmable logic array of claim 5, wherein said means for interconnecting comprises a plurality of links for selectively coupling said complement array among different ones of said input columns.
References Cited (Backward Citations)
US3818252A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1980-06-27 | 1980-12-27 | 1981-06-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1984-06-27 | 1984-12-27 | 1985-06-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1988-06-27 | 1988-12-27 | 1989-06-28 | $7700.00 | Window Closed / Lapsed |