US4032799A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Automatic gain control circuit
Assignee: Toshiba Corp
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Filing: 1976-03-02
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Granted: 1977-06-28
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Expires: 1996-03-02
Abstract
Abstract An automatic gain control circuit includes a first transistor whose base is supplied with an input signal and whose collector is impressed with a first source voltage through a first resistor and a second transistor whose collector is connected to the emitter of the first transistor, whose emitter is grounded and whose base is impressed with an automatic gain control voltage. The collector of the first transistor serves as an output terminal of the automatic gain control circuit. The automatic gain control circuit further includes a third transistor whose base is connected to the base of the second transistor and whose emitter is grounded and a fourth transistor whose emitter is connected to the collector of the third transistor, whose collector is connected to the base of the first transistor through a second resistor and is impressed with a second source voltage through a third resistor and whose base is connected to said collector through a fourth resistor.
Inventors
- 👤 Takashi Sugimoto
- 👤 Yoshio Wada
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 20:04
CPC Classifications
H; H03; H03G; H03G1/00; H03G1/0005; H03G3/00; H03G3/20; H03G3/30; H03G3/3005
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
139 words
An automatic gain control circuit comprising a first transistor whose base is connected to receive an input signal and whose collector is connected to receive a first source voltage through a first resistor; a second transistor whose collector is connected to the emitter of the first transistor, whose emitter is grounded and whose base is connected to receive an automatic gain control signal; a third transistor whose base is connected to the base of the second transistor, and whose emitter is grounded; a fourth transistor whose emitter is connected to the collector of the third transistor, whose collector is connected to receive a second source voltage through a second resistor and whose base and collector are connected to each other; and a third resistor connected between the base of the first transistor and the collector of the fourth transistor.
Claim 2
Dependent Claim
139 words
An automatic gain control circuit comprising a first transistor whose base is connected to receive an input signal and whose collector is connected to receive a first source voltage through a first resistor; a second transistor whose collector is connected to the emitter of the first transistor, whose emitter is grounded and whose base is connected to receive an automatic gain control signal; a third transistor whose base is connected to the base of the second transistor, and whose emitter is grounded; a fourth transistor whose emitter is connected to the collector of the third transistor, whose collector is connected to receive a second source voltage through a second resistor and whose base and collector are connected to each other; and a third resistor connected between the base of the first transistor and the collector of the fourth transistor.
Claim 3
Dependent Claim
23 words
The automatic gain control circuit according to claim 1, wherein the base and collector of the fourth transistor are short-circuited with each other.
Claim 4
Dependent Claim
45 words
The automatic gain control circuit according to claim 1, wherein the base of the fourth transistor is connected to the junction of the collector of said fourth transistor and the second resistor through a fourth resistor having substantially the same resistance of the third resistor.
Claim 5
Dependent Claim
142 words
The automatic gain control circuit according to claim 1, having the first transistor whose base is connected to the junction of the collector of the fourth transistor and second resistor through the third resistor, which further comprises a fifth transistor whose collector is connected to receive the first source voltage, whose emitter is connected to the collector of the first transistor through the first resistor and whose base is connected to receive an automatic gain control signal; and a sixth transistor whose base is connected to the base of the fifth transistor, whose collector is connected to the collector of the fifth transistor through a fifth resistor and whose emitter is connected to the bases of the second and third transistor, whereby the automatic gain control signal is impressed on the bases of the second and third transistors through the sixth transistor.
Claim 6
Dependent Claim
23 words
The automatic gain control circuit according to claim 4, wherein the base and collector of the fourth transistor are short-circuited with each other.
Claim 7
Dependent Claim
44 words
The automatic gain control circuit according to claim 4, wherein the base of the fourth transistor is connected to the junction of the collector of said fourth transistor and second resistor through a fourth resistor having substantially the same resistance as the third resistor.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1980-06-27 | 1980-12-27 | 1981-06-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1984-06-27 | 1984-12-27 | 1985-06-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1988-06-27 | 1988-12-27 | 1989-06-28 | $7700.00 | Window Closed / Lapsed |