US3840756A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Gain control circuit using sample and hold feedback
Assignee: Bull HN Information Systems Italia SpA
•
Filing: 1973-02-05
•
Granted: 1974-10-08
•
Expires: 1993-02-05
Abstract
Abstract In a system for recovering data from a magnetic medium, an automatic gain control circuit uses a sample and hold feedback technique. A field effect transistor has source and drain terminals connected to a system amplifier in a gain-controlling configuration. During a read operation, the gate voltage for this transistor varies as a function of system output voltage; i.e., the output is continuously sampled. A capacitor in the feedback loop is charged during a read operation to a holding voltage. This holding voltage provides gate bias for the transistor between read operations to prevent gain swings at the start of new operations.
Inventors
- 👤 W Jones
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 08:56
CPC Classifications
H; H03; H03G; H03G3/00; H03G3/20; H03G3/30; H03G3/3005; H03G3/301; H03G3/3015; G; G11; G11B; G11B5/00; G11B5/02; G11B5/027; G11B5/035; H03K; H03K5/00; H03K5/01; H03K5/02
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
193 words
For processing electrical read signals in a system having a transducer for writing data onto or for reading data signals or indexing signals from an adjacent data storage medium and further having a differential amplifier in circuit with the transducer, an improved automatic gain control circuit comprising: a. means for detecting the amplitude of signals on the output side of the differential amplifier; b. a field effect transistor having its source and drain terminals connected to the differential amplifier in a gain controlling configuration; c. a charge storing device connected between the gate terminal of said field effect transistor and a reference voltage terminal; and d. switching means connected in series between the gate terminal of said field effect transistor and the output of said detecting means 1. for connecting the gate terminal and the detecting means during the processing of read data signals to thereby vary the source-drain resistance of the field effect transistor as a function of the detected signals, and 2. for isolating the gate terminal from the detecting means during data write operations to fix the source-drain resistance as a function of the charge on said charge storing device.
Claim 2
Dependent Claim
193 words
For processing electrical read signals in a system having a transducer for writing data onto or for reading data signals or indexing signals from an adjacent data storage medium and further having a differential amplifier in circuit with the transducer, an improved automatic gain control circuit comprising: a. means for detecting the amplitude of signals on the output side of the differential amplifier; b. a field effect transistor having its source and drain terminals connected to the differential amplifier in a gain controlling configuration; c. a charge storing device connected between the gate terminal of said field effect transistor and a reference voltage terminal; and d. switching means connected in series between the gate terminal of said field effect transistor and the output of said detecting means 1. for connecting the gate terminal and the detecting means during the processing of read data signals to thereby vary the source-drain resistance of the field effect transistor as a function of the detected signals, and 2. for isolating the gate terminal from the detecting means during data write operations to fix the source-drain resistance as a function of the charge on said charge storing device.
Claim 3
Dependent Claim
29 words
for isolating the gate terminal from the detecting means during data write operations to fix the source-drain resistance as a function of the charge on said charge storing device.
Claim 4
Dependent Claim
29 words
for isolating the gate terminal from the detecting means during data write operations to fix the source-drain resistance as a function of the charge on said charge storing device.
Claim 5
Dependent Claim
56 words
An improved gain control circuit as recited in claim 1 wherein said switching means comprises a second field effect transistor having its source and drain terminals connected in series between the gate terminal of the first mentioned transistor and the output of said detecting means and its gate terminal connected to a source of logic signals.
Claim 6
Dependent Claim
18 words
An improved gain control circuit as recited in claim 2 wherein said charge storing device comprises a capacitor.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-10-07 | 1978-04-08 | 1978-10-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-10-07 | 1982-04-08 | 1982-10-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-10-07 | 1986-04-08 | 1986-10-08 | $7700.00 | Window Closed / Lapsed |