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US4030043A Expired / Lapsed US ⏱️ 0.0 years remaining

Generalized operational amplifier

Assignee: Individual
•
Filing: 1975-02-19
•
Granted: 1977-06-14
•
Expires: 1995-02-19
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Abstract

Abstract An operational amplifier is provided with two current outputs instead of the usual one voltage output. The amplifier has two current inputs, ideally zero input impedance and ideally infinite current gain and output impedance.

Inventors

  • 👤 Thomas Allan Hamilton

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 14:09
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/34; H03F3/343; H03F3/347

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 83 words
An operational amplifier comprising an input stage of first and second differential current inputs having a low input impedance connected between said inputs, a high current gain stage, an output stage of at least first and second differential current outputs, each output having at least one of each polarity and a high output impedance connected between said first and said second differential current outputs, said high current gain stage being interposed between said input stage and said output stage and connected to each.
Claim 2
Dependent Claim 83 words
An operational amplifier comprising an input stage of first and second differential current inputs having a low input impedance connected between said inputs, a high current gain stage, an output stage of at least first and second differential current outputs, each output having at least one of each polarity and a high output impedance connected between said first and said second differential current outputs, said high current gain stage being interposed between said input stage and said output stage and connected to each.
Claim 3
Dependent Claim 25 words
An amplifier as claimed in claim 1 wherein each of said differential inputs comprises a pair of composite transistors in a differential common base mode.
Claim 4
Dependent Claim 34 words
An amplifier as claimed in claim 2 wherein said high current gain stage is connected to the output of the said composite transistors, said stage comprising Darlington connected transistors, connected as a differential pair.
Claim 5
Dependent Claim 36 words
An amplifier as claimed in claim 2 comprising means for matching terminals of said differential inputs, said means comprising transistors in a feedback loop around said composite transistors which equalize the currents between the said terminals.
Claim 6
Dependent Claim 57 words
An amplifier as claimed in claim 1 further comprising a resistive feedback circuit between said first differential current output and said second differential current input, a resistive load in the circuit of said second differential current input and a load resistor in the circuit of said first differential current output to provide a voltage controlled voltage source.
Claim 7
Dependent Claim 36 words
An amplifier as claimed in claim 1 comprising a common resistive load in a circuit connecting the said second differential current input and the said first differential current output to provide a voltage controlled current source.
Claim 8
Dependent Claim 49 words
An amplifier as claimed in claim 1 comprising a resistive feedback circuit connected between the said second differential current output and the said first differential current input and a resistive load in the output circuit of the said second differential current output to provide a current controlled voltage source.
Claim 9
Dependent Claim 48 words
An amplifier as claimed in claim 1 comprising a resistive feedback circuit connected between the said first differential current input and the said second differential current output and a resistive load in the circuit of the said second differential current output to provide a current controlled current source.
Claim 10
Dependent Claim 18 words
An amplifier as claimed in claim 1 wherein at least one of said differential current inputs is ungrounded.
Claim 11
Dependent Claim 158 words
An operational amplifier comprising an input stage of first and second differential current inputs having a low input impedance connected betweeen said inputs, a high current gain stage, an output stage of at least first and second differential current outputs, each output having at least one of each polarity and a high output impedance connected between said first and second differential current outputs, said high current gain stage being interposed between said input stage and said output stage and connected to each; each of said differential inputs comprising a pair of composite transistors in a differential common base mode; said high current gain stage being connected to the output of said composite transistors; said high current gain stage comprising Darlington connected transistors connected as a differential pair; and further comprising means for matching terminals of said differential inputs, said means comprising transistors in a feedback loop around said composite transistors which equalize the currents between the said terminals.
Claim 12
Dependent Claim 158 words
An operational amplifier comprising an input stage of first and second differential current inputs having a low input impedance connected betweeen said inputs, a high current gain stage, an output stage of at least first and second differential current outputs, each output having at least one of each polarity and a high output impedance connected between said first and second differential current outputs, said high current gain stage being interposed between said input stage and said output stage and connected to each; each of said differential inputs comprising a pair of composite transistors in a differential common base mode; said high current gain stage being connected to the output of said composite transistors; said high current gain stage comprising Darlington connected transistors connected as a differential pair; and further comprising means for matching terminals of said differential inputs, said means comprising transistors in a feedback loop around said composite transistors which equalize the currents between the said terminals.

References Cited (Backward Citations)

US3042876A Cited
US3852678A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1980-06-13 1980-12-13 1981-06-14 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1984-06-13 1984-12-13 1985-06-14 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1988-06-13 1988-12-13 1989-06-14 $7700.00 Window Closed / Lapsed

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