Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
187 words
A compensation storage element for dynamic semiconductor stores in which a main storage element is operatively connected to a word line and a bit line, and an evaluation circuit is operatively connected to the bit line by means of which the storage element may be read out, comprising a compensation capacitor, having one side thereof connected to the bit line at the opposite side of the evaluation circuit to which the storage element is connected, means including a compensation-selector line operatively connected to the other side of the compensation capacitor for controlling the application of a selector pulse train thereto, the compensation capacitor being dimensioned in accordance with the following equation: ##STR9## in which C C = compensation capacitance, C A = bit line capacitance, φ N = effective value of the pulse train applied to the compensation capacitor, U ref = reference voltage, and U B0 and U B1 = read out voltage for binary "0" or "1" respectively, whereby the correcting voltage applied to the bit line is raised to the most favorable middle potential of U BD = 0.5(U.sub. B0 + U B1 ).
Claim 2
Dependent Claim
187 words
A compensation storage element for dynamic semiconductor stores in which a main storage element is operatively connected to a word line and a bit line, and an evaluation circuit is operatively connected to the bit line by means of which the storage element may be read out, comprising a compensation capacitor, having one side thereof connected to the bit line at the opposite side of the evaluation circuit to which the storage element is connected, means including a compensation-selector line operatively connected to the other side of the compensation capacitor for controlling the application of a selector pulse train thereto, the compensation capacitor being dimensioned in accordance with the following equation: ##STR9## in which C C = compensation capacitance, C A = bit line capacitance, φ N = effective value of the pulse train applied to the compensation capacitor, U ref = reference voltage, and U B0 and U B1 = read out voltage for binary "0" or "1" respectively, whereby the correcting voltage applied to the bit line is raised to the most favorable middle potential of U BD = 0.5(U.sub. B0 + U B1 ).
Claim 3
Dependent Claim
108 words
A compensation storage element according to claim 1, wherein said compensation capacitor has one side thereof connected to the source of a compensation-selector transistor which has its drain connected to the bit line and its gate connected to the compensation-selector line, the compensation capacitor having the other side thereof connected to a correcting voltage in the form of a pulse train, the capacitive application thereof to the bit line being controlled by a pulse train on said compensation-selector line, said compensation capacitor being dimensioned in accordance with the following equation: ##STR10## in which φ CP = value of the correcting voltage pulse train applied to the compensation capacitor.
Claim 4
Dependent Claim
87 words
A compensation storage element according to claim 1, wherein said compensation capacitor has one side thereof connected to the source of a compensation-selector transistor which has its drain connected to the bit line and its gate connected to the compensation-selector line, the compensation capacitor having the other side thereof connected to the bit line, said compensation capacitor being dimensioned in accordance with the following equation: ##STR11## in which φ SP = value of the selector pulse train, and U T = starting voltage of the compensation-selector transistor.
Claim 5
Dependent Claim
74 words
A compensation storage element according to claim 1, wherein said compensation capacitor is in the form of a MOS capacitance, and has one side thereof connected to the bit line and the other side thereof connected to the compensation selector line, said compensation capacitor being dimensioned in accordance with the following equation: ##STR12## in which φ SP = value of the selector pulse train, and U TD = starting voltage of the MOS capacitance.