US4024343A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Circuit arrangement for synchronizing an output signal in accordance with a periodic pulsatory input signal
Assignee: US Philips Corp
•
Filing: 1975-05-07
•
Granted: 1977-05-17
•
Expires: 1995-05-07
Abstract
Abstract Synchronizing circuit arrangement, for example for line synchronization in a television receiver, including digital means, the frequency of the oscillator being twice that of the signal to be synchronized. A frequency divider circuit, for example a master-slave flipflop, produces two output signals one of which serves as a reference signal for the phase discriminator whilest the other is applied together with the input signal of the circuit to a coincidence stage.
Inventors
- 👤 Adriaan Cense
- 👤 Jan van Straaten
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 02:26
CPC Classifications
H; H04; H04N; H04N5/00; H04N5/04; H04N5/12; H04N5/126
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
149 words
Circuit arrangement for synchronizing an output signal in accordance with a periodic pulsatory input signal, comprising a coincidence stage having a first input means for receiving the input signal, a second input, and an output, a phase discriminator coupled to said output and including a low-pass filter, an oscillator coupled to said filter and controllable in frequency and in phase, the frequency of the oscillator in the synchronized condition being twice that of the input signal, a frequency divider circuit comprising a bistable element coupled to said oscillator and having two output terminals, a transition in the signal at an output terminal of the frequency divider circuit occuring within each time interval in which there is no transition in the signal at the other output terminal, the first output terminal being coupled to the phase discriminator and the second output terminal being coupled to the coincidence stage second input.
Claim 2
Dependent Claim
149 words
Circuit arrangement for synchronizing an output signal in accordance with a periodic pulsatory input signal, comprising a coincidence stage having a first input means for receiving the input signal, a second input, and an output, a phase discriminator coupled to said output and including a low-pass filter, an oscillator coupled to said filter and controllable in frequency and in phase, the frequency of the oscillator in the synchronized condition being twice that of the input signal, a frequency divider circuit comprising a bistable element coupled to said oscillator and having two output terminals, a transition in the signal at an output terminal of the frequency divider circuit occuring within each time interval in which there is no transition in the signal at the other output terminal, the first output terminal being coupled to the phase discriminator and the second output terminal being coupled to the coincidence stage second input.
Claim 3
Dependent Claim
27 words
Circuit arrangement as claimed in claim 1, wherein the bistable element comprises a master-slave flipflop which divides the frequency of the signal applied to it by two.
Claim 4
Dependent Claim
24 words
Circuit arrangement as claimed in claim 1, wherein the output signal of the circuit comprises a signal output terminal of the frequency divider circuit.
Claim 5
Dependent Claim
41 words
Circuit arrangement as claimed in claim 1, wherein the phase discriminator comprises a controllable switch which is rendered conductive whenever the input signal and the signal at the second output terminal of the frequency divider circuit occur at least partly simultaneously.
Claim 6
Dependent Claim
30 words
Circuit arrangement as claimed in claim 4, wherein at least the oscillator, the frequency divider circuit, the coincidence stage and the controllable switch are binary elements in monolithic integrated-circuit form.
Claim 7
Dependent Claim
49 words
Circuit arrangement as claimed in claim 1 for use in a television receiver, the input signal including line synchronizing pulses, said circuit further comprising a further frequency divider circuit means coupled to said oscillator for dividing the frequency by a divisor equal to the number of lines per picture.
References Cited (Backward Citations)
US2697131A
Cited
US3127570A
Cited
US3567857A
Cited
US3567861A
Cited
US3641258A
Cited
US3904823A
Cited
US3821470A
Cited
US3863080A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1980-05-16 | 1980-11-15 | 1981-05-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1984-05-16 | 1984-11-15 | 1985-05-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1988-05-16 | 1988-11-15 | 1989-05-17 | $7700.00 | Window Closed / Lapsed |