Single bit doppler processor for guidance missile system

Claim 2

A hybrid digital processor for a missile guidance system for obtaining velocity track and on target signals in a continuous mode comprising: a. a first mixer fed by an IF sum signal of the missile guidance system; b. a local oscillator fed to the first mixer; c. a limiter fed by the first mixer; d. a clock pulsed sampler fed by the limiter; e. a plurality of interconnected bipolar shift registers; f. switching means for controlling the input, output, and recirculation of the shift registers; g. a stepping voltage source; h. a voltage controlled oscillator fed by the stepping voltage source; i. a second mixer fed by the shift registers and the voltage controlled oscillator; j. an envelope detector fed by the second mixer; k. a threshold pulse generator fed by the envelope detector; l. a bank of one bit counters; and m. means for selecting one of the counters for pulsing, the selecting means being fed by the stepping voltage source and the threshold pulse generator with the outputs of the counters being velocity track and on target signals.

Claim 3

A hybrid signal digital processor for a missile guidance system for obtaining velocity track and on target signals in a pause-on-target mode comprising: a. a first mixer fed by an IF sum signal of the missile system; b. a local oscillator fed to the first mixer; c. a limiter fed by the first mixer; d. a clock pulsed sampler fed by the limiter; e. a pair of shift registers fed by the sampler with each register of the pair having an input and output and each register of the pair having switching means for feeding the input to the output; f. a switching logic circuit connected to the pair of shift registers and the associated switching means for controlling the switching and the pulsing thereof; g. a stepping voltage source; h. a voltage controlled oscillator fed by the stepping voltage source; i. a second mixer fed by the pair of shift registers and the voltage controlled oscillator; j. an envelope detector fed by the second mixer; k. a threshold pulse generator fed by the envelope detector; l. a bank of two bit counters; and m. means selecting one of the counters for pulsing, the selecting means being fed by the stepping voltage source and the threshold pulse generator with the outputs of the counters being velocity track and on target signals.

Claim 4

A hybrid signal digital processor for a missile guidance system for obtaining velocity track and on target signals in a pause-on-target mode comprising: a. a first mixer fed by an IF sum signal of the missile system; b. a local oscillator fed to the first mixer; c. a limiter fed by the first mixer; d. a clock pulsed sampler fed by the limiter; e. a pair of shift registers fed by the sampler with each register of the pair having an input and output and each register of the pair having switching means for feeding the input to the output; f. a switching logic circuit connected to the pair of shift registers and the associated switching means for controlling the switching and the pulsing thereof; g. a stepping voltage source; h. a voltage controlled oscillator fed by the stepping voltage source; i. a second mixer fed by the pair of shift registers and the voltage controlled oscillator; j. an envelope detector fed by the second mixer; k. a threshold pulse generator fed by the envelope detector; l. a bank of two bit counters; and m. means selecting one of the counters for pulsing, the selecting means being fed by the stepping voltage source and the threshold pulse generator with the outputs of the counters being velocity track and on target signals.