Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
142 words
A differential pulse code modulation encoder for converting an analog input signal to a digital output signal, said output signal representing the difference between said input signal and a decoded version of said output signal, comprising a comparator for generating an error signal formed by subtracting said decoded version of said output signal from said input signal, quantizing means substantially instantaneously responsive to said comparator for generating said digital output signal by sampling said error signal and converting said samples to digital form, and means for generating said decoded version of said output signal characterized by a digital to analog converter for generating an intermediate analog signal in response to said digital output signal, a serial chain of at least three integrators for receiving said intermediate analog signal, and means for summing the outputs of each of said integrators of said chain.
Claim 2
Dependent Claim
142 words
A differential pulse code modulation encoder for converting an analog input signal to a digital output signal, said output signal representing the difference between said input signal and a decoded version of said output signal, comprising a comparator for generating an error signal formed by subtracting said decoded version of said output signal from said input signal, quantizing means substantially instantaneously responsive to said comparator for generating said digital output signal by sampling said error signal and converting said samples to digital form, and means for generating said decoded version of said output signal characterized by a digital to analog converter for generating an intermediate analog signal in response to said digital output signal, a serial chain of at least three integrators for receiving said intermediate analog signal, and means for summing the outputs of each of said integrators of said chain.
Claim 3
Dependent Claim
34 words
The invention defined in claim 1 wherein said analog input signal has a bandwidth f.sub. o and said quantizing means is arranged for sampling at a rate of at least 5 f o .
Claim 4
Dependent Claim
16 words
The invention defined in claim 1 wherein said digital output signal includes a plurality of bits.
Claim 5
Dependent Claim
45 words
In a differential pulse code modulation encoder including means for substantially instantaneously converting an analog input signal into a digital output signal which represents said input signal, a decoder for reconverting said output signal to a good prediction of said input signal, said decoder comprising
Claim 6
Dependent Claim
45 words
In a differential pulse code modulation encoder including means for substantially instantaneously converting an analog input signal into a digital output signal which represents said input signal, a decoder for reconverting said output signal to a good prediction of said input signal, said decoder comprising
Claim 7
Dependent Claim
42 words
first means including a serial chain of M integrators, wherein M ≧ 3, for receiving said output signal, and 2. second means for obtaining the sum of the outputs of each of said integrators of said chain to form said good prediction.
Claim 8
Dependent Claim
42 words
first means including a serial chain of M integrators, wherein M ≧ 3, for receiving said output signal, and 2. second means for obtaining the sum of the outputs of each of said integrators of said chain to form said good prediction.
Claim 9
Dependent Claim
31 words
The invention defined in claim 4 wherein said first means further includes means for converting said received output signal to an analog signal and wherein said M integrators are analog integrators.
Claim 10
Dependent Claim
40 words
The invention defined in claim 5 wherein said analog signal has a bandwidth f.sub. o and said converting means includes a quantizer adapted to sample said analog signal at a rate at least five times greater than f o .
Claim 11
Dependent Claim
16 words
The invention defined in claim 4 wherein said digital output signal includes a plurality of bits.