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US4017802A
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Stored electronic device for producing pulses having predetermined rate and sequence
Assignee: ITALIANA MATERIALI PRESSATI RESINATI E SIMILI S I M P R Soc
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Filing: 1975-07-17
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Granted: 1977-04-12
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Expires: 1995-07-17
Abstract
Abstract A stored electronic device for producing pulses having predetermined rate and sequence on a number of output channels with a single input for supply and start. A selector is provided for preselecting the number of pulses which at each operation of the device are made sequentially available in the respective output channel or channels; two logical gates are energized by the operation of the device, performing the function of setting to zero all of the bistable logics and blocking a decoder. A fast oscillator acts upon a first counter capable of supplying scanning sequences to the decoder, and one or more buffer power stages with a memory or storage which is independent of any interruption of the power supply, the inputs of which are connected to the decoder and the outputs of which form the device output channels; the memory in the buffer stages being capable of blocking the fast oscillator and releasing a slow oscillator. A second counter supplies respective signals to logical gates for selection of the pulse sequences, energizing that logical gate which has been preselected by the selector; an inverter or changeover switch receives a signal from the energized logical gate producing a pulse which will block the slow oscillator determining the pulse sequence; and a resetting circuit is energized to bring the memory to its initial state.
Inventors
- 👤 Francesco Ferrarin
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 06:11
CPC Classifications
H; H03; H03K; H03K3/00; H03K3/78; G; G05; G05B; G05B19/00; G05B19/02; G05B19/04; G05B19/045; H03K5/00; H03K5/15; H03K5/15013; H03K5/1502
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
263 words
A stored electronic device for producing pulses having a predetermined rate and sequence on a number of output channels comprising, in combination, a single input connected to an associated power supply for starting the device, a selector for preselecting a number of pulses that for each operation of the device are sequentially made available on the respective output channel or channels, a decoder having a plurality of channels, two logical gates activated upon operation of the device which act upon one of the inputs of said decoder for blocking said decoder, a first counter for supplying scanning sequences to said decoder, a fast oscillator acting upon said first counter, a slow oscillator, at least one buffer power stage having a memory independent of any interruption in said power supply, said memory having inputs which are connected to said decoder, and outputs which form the output channels of the device, said memory in said buffer stage being arranged to block said fast oscillator and release said slow oscillator for determining the pulse rate, a plurality of logical gates, a second counter for supplying respective signals to said logical gates each for selecting a number of pulses to activate a gate which is preselected by said selector, an inverter switch for receiving a signal from said activated logical gate to provide a pulse blocking said slow oscillator a resetting circuit arranged to be actuated when the last output channel is activated to bring said memory back to an initial state and means for connecting said memory to said slow oscillator and to said second counter.
Claim 2
Dependent Claim
263 words
A stored electronic device for producing pulses having a predetermined rate and sequence on a number of output channels comprising, in combination, a single input connected to an associated power supply for starting the device, a selector for preselecting a number of pulses that for each operation of the device are sequentially made available on the respective output channel or channels, a decoder having a plurality of channels, two logical gates activated upon operation of the device which act upon one of the inputs of said decoder for blocking said decoder, a first counter for supplying scanning sequences to said decoder, a fast oscillator acting upon said first counter, a slow oscillator, at least one buffer power stage having a memory independent of any interruption in said power supply, said memory having inputs which are connected to said decoder, and outputs which form the output channels of the device, said memory in said buffer stage being arranged to block said fast oscillator and release said slow oscillator for determining the pulse rate, a plurality of logical gates, a second counter for supplying respective signals to said logical gates each for selecting a number of pulses to activate a gate which is preselected by said selector, an inverter switch for receiving a signal from said activated logical gate to provide a pulse blocking said slow oscillator a resetting circuit arranged to be actuated when the last output channel is activated to bring said memory back to an initial state and means for connecting said memory to said slow oscillator and to said second counter.
Claim 3
Dependent Claim
21 words
A device as set forth in claim 1, wherein the component parts of the device are of the solid state type.
Claim 4
Dependent Claim
15 words
A device as claimed in claim 1, wherein said memory is of the magnetic type.
Claim 5
Dependent Claim
72 words
A device as claimed in claim 3 wherein said memory comprises a plurality of toroidal magnetic cores and a circuit for resetting a magnetization state interconnected with said cores, a circuit interconnected with each of said magnetic cores for reversing said magnetization state and activating the associated output channel, a flip-flop circuit and a third common induced circuit for blocking said fast oscillator and starting said slow oscillator through said flip-flop circuit.
Claim 6
Dependent Claim
28 words
A device as claimed in claim 3, wherein said memory comprises a magnetic holding relay, having a position for testing the state of the output channels being scanned.
Claim 7
Dependent Claim
42 words
A device as claimed in claim 1 wherein said slow oscillator is arranged to generate rectangular waves having active and passive periods and comprises a variable time constant circuit for varying the active-passive ratio of said waves and therefore said output pulses.
Claim 8
Dependent Claim
41 words
A device as claimed in claim 6, wherein said variable time constant circuit comprises a first R-C variable resistor circuit for varying said active period, and a second R-C variable resistor circuit for varying said passive period of said rectangular waves.
Claim 9
Dependent Claim
70 words
A device as claimed in claim 3, wherein the number of output channels of the device is independent of the number of decoder channels, said decoder being arranged to sequentially supply all of said output channels without activating the same and a series of flip-flops to provide an additional signal for activation of the output channels, said series of flip-flops being preset to enable the pulse output in due sequence.
Claim 10
Dependent Claim
80 words
A device as claimed in claim 8 wherein said toroidal magnetic cores are arranged to control the pulse output in the associated output channel by premagnetization thereof, an additional circuit for extending said premagnetization to at least some of said cores and not to the remaining cores to thereby provide for activation only of those channels associated with said additional circuit, while maintaining the same sequence in the increasing direction of numeration for said channels and at the same rate.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1980-04-11 | 1980-10-11 | 1981-04-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1984-04-11 | 1984-10-11 | 1985-04-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1988-04-11 | 1988-10-11 | 1989-04-12 | $7700.00 | Window Closed / Lapsed |