Amplifier with FET having gate leakage current limitation

Claim 2

An amplifier including a drive stage and an output stage, comprising: a field effect transistor included in said output stage, one of the source and drain electrodes being connected to an output load and the other of said electrodes being supplied with an operating voltage; transistor emitter-follower means included in said drive stage having a control electrode supplied with a signal to be amplified and an emitter electrode direct coupled to the gate electrode of said field effect transistor; and means for limiting the gate leakage current of said field effect transistor including constant current means coupled as a load to said emitter electrode of said transistor means for providing a current of predetermined magnitude, said constant current means also being coupled to said gate electrode of said field effect transistor.

Claim 3

An amplifier in accordance with claim 1 wherein said constant current means comprises additional transistor means having a control electrode supplied with a constant bias voltage and having first and second output electrodes connected in series with the first and second output electrodes of said transistor means; and bias means coupled to the control electrode of said additional transistor means for supplying said constant bias voltage thereto.

Claim 4

An amplifier in accordance with claim 1 further comprising means for supplying the same operating voltage to said field effect transistor and to said transistor means.

Claim 5

An amplifier in accordance with claim 3 wherein said last-mentioned means includes a resistor for supplying said operating voltage to said other electrode of said transistor means.

Claim 6

An amplifier in accordance with claim 1 wherein the operating voltage supplied to said transistor means is greater than the operating voltage supplied to said field effect transistor.

Claim 7

An amplifier in accordance with claim 5 wherein said drive stage further includes a second transistor for receiving an input signal and for supplying same to said base electrode in said transistor emitter-follower means.

Claim 8

An amplifier in accordance with claim 6 wherein said field effect transistor is connected to said output load in drain-follower configuration.

Claim 9

An amplifier in accordance with claim 6 further comprising biasing means coupled to said second transistor for supplying a predetermined base bias voltage thereto.

Claim 10

An amplifier in accordance with claim 1 wherein said field effect transistor is a vertical junction field effect transistor having triode-type dynamic characteristics.

Claim 11

An amplifier in accordance with claim 9 wherein said field effect transistor is formed of an intrinsic semiconductor region having an overlying annular semiconductor region of one conductivity type comprising the gate region; and a further overlying semiconductor region of an opposite conductivity type comprising the source region.

Claim 12

An amplifier in accordance with claim 1 wherein said output stage includes a second field effect transistor connected to said output load such that the first and second field effect transistors are connected to said output load in push-pull relation; and said drive stage includes second transistor emitter-follower means having a control electrode supplied with a signal to be amplified and an emitter electrode direct coupled to the gate electrode of said second field effect transistor and, additionally, to second constant current means, said second constant current means being coupled as a load to said emitter electrode of said second transistor emitter-follower means and also to said gate electrode of said second field transistor to limit the gate leakage current of the latter.

Claim 13

An amplifier in accordance with claim 11 wherein said first and second field effect transistors are complementary; and wherein said first and second transistor emitter-follower means comprise first and second complementary transistors driven in complementary relation by an input signal.

Claim 14

An amplifier, comprising: an input stage for receiving an input signal and for providing complementary output signals in response thereto; a drive stage coupled to said input stage for receiving said complementary output signals and including first transistor means having an input electrode to which one of said complementary output signals is applied and having output electrodes, said drive stage further including second transistor means having an input electrode to which the other of said complementary output signals is applied and having output electrodes; an output stage including first and second field effect transistors, the gate electrode of said first field effect transistor being direct coupled to one of the output electrodes of said first transistor means and the gate electrode of said second field effect transistor being direct coupled to one of the output electrodes of said second transistor means, one of the source and drain electrodes of each of said field effect transistor being coupled to an output load; and first and second constant current sources connected as respective loads to said one output electrode of said first and second transistor means, respectively, and also to said gate electrode of said first and second field effect transistors, respectively, to limit the respective gate leakage currents of said first and second field effect transistors.

Claim 15

An amplifier, comprising: an input stage for receiving an input signal and for providing complementary output signals in response thereto; a drive stage coupled to said input stage for receiving said complementary output signals and including first transistor means having an input electrode to which one of said complementary output signals is applied and having output electrodes, said drive stage further including second transistor means having an input electrode to which the other of said complementary output signals is applied and having output electrodes; an output stage including first and second field effect transistors, the gate electrode of said first field effect transistor being direct coupled to one of the output electrodes of said first transistor means and the gate electrode of said second field effect transistor being direct coupled to one of the output electrodes of said second transistor means, one of the source and drain electrodes of each of said field effect transistor being coupled to an output load; and first and second constant current sources connected as respective loads to said one output electrode of said first and second transistor means, respectively, and also to said gate electrode of said first and second field effect transistors, respectively, to limit the respective gate leakage currents of said first and second field effect transistors.

Claim 16

An amplifier in accordance with claim 13 wherein said first and second field effect transistors are connected to said output load in complementary push-pull relation.

Claim 17

An amplifier in accordance with claim 14 wherein said first and second transistor means include first and second transistors, respectively, direct coupled to said first and second field effect transistors in emitter-follower configuration.

Claim 18

An amplifier in accordance with claim 15 wherein said input stage comprises differential amplifier means for producing said complementary output signals to alternately drive said first and second transistors.

Claim 19

An amplifier in accordance with claim 16 further comprising power supply means for supplying operating voltages to said first and second field effect transistors and to said first and second transistors.

Claim 20

An amplifier in accordance with claim 17 wherein said first and second field effect transistors are connected to said output load in source-follower configuration; and said power supply means comprises means for applying the same operating voltages across the first and second field effect transistors and across the first and second transistors.

Claim 21

An amplifier in accordance with claim 17 wherein said first and second field effect transistors are connected to said output load in common source configuration; and said power supply means comprises means for applying higher operating voltages across the first and second transistors than across the first and second field effect transistors.

Claim 22

An amplifier in accordance with claim 15 wherein said first transistor means further includes a first additional transistor for receiving one of said complementary output signals and for applying same to said first transistor; and said second transistor means further includes a second additional transistor for receiving the other of said complementary output signals and for applying same to said second transistor.

Claim 23

An amplifier in accordance with claim 20 further comprising a bias circuit connected between the respective base electrodes of said first and second additional transistors for applying an adjustable bias voltage to said first and second additional transistors.

Claim 24

An amplifier in accordance with claim 15 wherein said first and second constant current sources limit the respective gate leakage currents of said first and second field effect transistors during respective periods that each field effect transistor is cut off to a predetermined level, each said constant current source comprising a further transistor having its base electrode supplied with a constant bias voltage and having its collector-emitter circuit connected in series with the emitter electrode of a corresponding one of said first and second transistors; and a constant bias source coupled to said base electrode of said further transistor for supplying said constant bias voltage thereto.