Darlington transistor switching circuit for reactive load

Claim 2

A transistorized switching circuit for a reactive load, comprising an input transistor and an output transistor, each said transistor having a base, emitter, and collector electrodes, said input transistor being directly electrically coupled at its emitter electrode to the base electrode of the output transistor, means for connecting a predetermined switching voltage to the base and emitter electrode of the input transistor, means for connecting electrically a reactive load in series with a supply voltage source across the collector and emitter electrode of the output transistor, said input transistor structured to have a collector-emitter sustaining voltage substantially less than the collector-emitter sustaining voltage of the output transistor said sustaining voltages being of sufficient difference that the input transistor collector-emitter clamps any reactive load voltage to the sustaining voltage of the input transistor and prevents power dissipation at the sustaining voltage of the output transistor, and the sustaining voltage of the output transistor is the disconnected common connection of the input and output transistor collectors.

Claim 3

A circuit according to claim 1 wherein the input transistor has a sustaining voltage in the neighborhood of seventy-five percent of the sustaining voltage of the output transistor.

Claim 4

In combination, a first and second transistor, each said transistor having a base, emitter, and collector electrode, the emitter electrode of the first transistor being directly electrically coupled to the base electrode of the second transistor, the collector electrodes of the first and second transistors being electrically coupled, a reactive load, a supply voltage source connected in series with the reactive load, said reactive load and supply voltage being electrically coupled across the collector electrodes and emitter electrode of the second transistor, a switching voltage source electrically coupled across the base and emitter electrodes of the first and second transistors, said first transistor being structured to have a higher gain than the second transistor, and said first transistor having a collector-emitter sustaining voltage substantially less than the collector-emitter sustaining voltage of the second transistor, said supply voltage being slightly less than the sustaining voltage of the first transistor, said difference between the input and output transistor sustaining voltages being such that the reactive load voltage does not reach the sustaining voltage level of the second transistor in response to the shutting "off" of the switching voltage for the first transistor.

Claim 5

In combination, a first and second transistor, each said transistor having a base, emitter, and collector electrode, the emitter electrode of the first transistor being directly electrically coupled to the base electrode of the second transistor, the collector electrodes of the first and second transistors being electrically coupled, a reactive load, a supply voltage source connected in series with the reactive load, said reactive load and supply voltage being electrically coupled across the collector electrodes and emitter electrode of the second transistor, a switching voltage source electrically coupled across the base and emitter electrodes of the first and second transistors, said first transistor being structured to have a higher gain than the second transistor, and said first transistor having a collector-emitter sustaining voltage substantially less than the collector-emitter sustaining voltage of the second transistor, said supply voltage being slightly less than the sustaining voltage of the first transistor, said difference between the input and output transistor sustaining voltages being such that the reactive load voltage does not reach the sustaining voltage level of the second transistor in response to the shutting "off" of the switching voltage for the first transistor.

Claim 6

A combination according to claim 3 wherein the first transistor has a sustained voltage in the neighborhood of seventy-five percent of the sustaining voltage of the second transistor.

Claim 7

A combination according to claim 3 wherein the reactive load has an inductive portion.

Claim 8

A Darlington transistor circuit, comprising an input transistor and an output transistor, each said transistor having a base, emitter, and collector electrodes, said input transistor being directly electrically coupled at its emitter to the base of the output transistor, said input and output transistors being electrically commonly coupled at their collector electrodes, means for connecting the base of the input transistor and emitter of the output transistor to a predetermined switching voltage, and means for connecting the commonly coupled collectors and the emitter of the output transistor to a load and supply voltage, said input transistor being structured to have a collector-emitter sustaining voltage substantially less than the collector-emitter sustaining voltage of the output transistor, whereby the input transistor clamps the transistor circuit at the sustaining voltage of the input transistor to prevent secondary-breakdown of the output transistor caused by the inductive portion of a load in response to the shutting off of the transistor circuit.

Claim 9

A Darlington transistor circuit, comprising an input transistor and an output transistor, each said transistor having a base, emitter, and collector electrodes, said input transistor being directly electrically coupled at its emitter to the base of the output transistor, said input and output transistors being electrically commonly coupled at their collector electrodes, means for connecting the base of the input transistor and emitter of the output transistor to a predetermined switching voltage, and means for connecting the commonly coupled collectors and the emitter of the output transistor to a load and supply voltage, said input transistor being structured to have a collector-emitter sustaining voltage substantially less than the collector-emitter sustaining voltage of the output transistor, whereby the input transistor clamps the transistor circuit at the sustaining voltage of the input transistor to prevent secondary-breakdown of the output transistor caused by the inductive portion of a load in response to the shutting off of the transistor circuit.

Claim 10

A Darlington transistor circuit for switching a reactive load, comprising an input transistor, an output transistor, said input transistor having a gain greater than the output transistor, each said transistor having a base, emitter, and collector, the emitter of the input transistor being coupled electrically to the base of the output transistor, the collector of the input and output transistors being commonly coupled electrically, means for connecting the emitter of the output transistor and the commonly coupled collector to a reactive load and a power source connected in series with the load, means for connecting the base of the input transistor and the emitter of the output transistor to a control signal source for biasing the base of the input transistor in response to a control signal to cause the input and output transistors to conduct, said input transistor structured to have a collector emitter sustaining voltage less than the collector-emitter sustaining voltage less than the collector-emitter sustaining voltage of the output transistor sufficient that upon cessation of the base bias applied to the input transistor, the reactive voltage through the circuit is clamped to the sustaining voltage of the input transistor to prevent secondary breakdown of the second transistor.

Claim 11

A Darlington transistor circuit for switching a reactive load, comprising an input transistor, an output transistor, said input transistor having a gain greater than the output transistor, each said transistor having a base, emitter, and collector, the emitter of the input transistor being coupled electrically to the base of the output transistor, the collector of the input and output transistors being commonly coupled electrically, means for connecting the emitter of the output transistor and the commonly coupled collector to a reactive load and a power source connected in series with the load, means for connecting the base of the input transistor and the emitter of the output transistor to a control signal source for biasing the base of the input transistor in response to a control signal to cause the input and output transistors to conduct, said input transistor structured to have a collector emitter sustaining voltage less than the collector-emitter sustaining voltage less than the collector-emitter sustaining voltage of the output transistor sufficient that upon cessation of the base bias applied to the input transistor, the reactive voltage through the circuit is clamped to the sustaining voltage of the input transistor to prevent secondary breakdown of the second transistor.

Claim 12

A Darlington transistor circuit according to claim 1 fabricated on a single silicon chip.

Claim 13

A Darlington transistor circuit according to claim 6 fabricated on a single silicon chip.

Claim 14

A Darlington transistor circuit according to claim 7 fabricated on a single silicon chip.