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US3210561A Expired / Lapsed US ⏱️ 0.0 years remaining

Compound transistor circuits

Assignee: GTE Sylvania Inc
•
Filing: 1961-05-03
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Granted: 1965-10-05
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Expires: 1981-05-03
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Abstract

No abstract record available.

Inventors

  • 👤 Herbert A Ullman

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 05:57
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/04; H03K17/041; H03K17/0416; H03K17/04166

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 157 words
A COMPOUND TRANSISTOR CIRCUIT WHEREIN BOTH TRANSISTORS SHARE THE LOAD AND THE OUTPUT TRANSISTOR OPERATES IN SATURATION, SAID CIRCUITS COMPRISING, FIRST AND SECOND TRANSISTORS EACH HAVING BASE, EMITTER AND COLLECTOR ELECTRODES, A POSITIVE AND NEGATIVE SOURCE OF ENERGIZING POTENTIAL, A DIRECT CONNECTION BETWEEN THE EMITTER OF SAID FIRST TRANSISTOR AND THE BASE OF SAID SECOND TRANSISTOR, MEANS DIRECTLY CONNECTING THE EMITTER OF SAID SECOND TRANSISTOR TO GROUND, MEANS FOR APPLYING A SIGNAL TO THE BASE OF SAID FIRST TRANSISTOR, A FIRST RESISTOR CONNECTED BETWEEN SAID DIRECT CONNECTION AND SAID POSITIVE SOURCE OF POTENTIAL, A LOAD CONNECTED BETWEEN SAID NEGATIVE SOURCE OF POTENTIAL AND THE COLLECTOR OF SAID FIRST TRANSISTOR, AND A SECOND RESISTOR CONNECTED BETWEEN RESPECTIVE COLLECTORS OF SAID FIRST AND SECOND TRANSISTORS AND OPERATIVE TO FORWARD BIAS THE COLLECTOR-BASE JUNCTION OF SAID SECOND TRANSISTOR TO CAUSE SAID SECOND TRANSISTOR TO OPERATE IN SATURATION OR AS CLOSE TO SATURATION AS POSSIBLE AND THEREBY REDUCE POWER DISSIPATION THEREIN.
Claim 2
Dependent Claim 157 words
A COMPOUND TRANSISTOR CIRCUIT WHEREIN BOTH TRANSISTORS SHARE THE LOAD AND THE OUTPUT TRANSISTOR OPERATES IN SATURATION, SAID CIRCUITS COMPRISING, FIRST AND SECOND TRANSISTORS EACH HAVING BASE, EMITTER AND COLLECTOR ELECTRODES, A POSITIVE AND NEGATIVE SOURCE OF ENERGIZING POTENTIAL, A DIRECT CONNECTION BETWEEN THE EMITTER OF SAID FIRST TRANSISTOR AND THE BASE OF SAID SECOND TRANSISTOR, MEANS DIRECTLY CONNECTING THE EMITTER OF SAID SECOND TRANSISTOR TO GROUND, MEANS FOR APPLYING A SIGNAL TO THE BASE OF SAID FIRST TRANSISTOR, A FIRST RESISTOR CONNECTED BETWEEN SAID DIRECT CONNECTION AND SAID POSITIVE SOURCE OF POTENTIAL, A LOAD CONNECTED BETWEEN SAID NEGATIVE SOURCE OF POTENTIAL AND THE COLLECTOR OF SAID FIRST TRANSISTOR, AND A SECOND RESISTOR CONNECTED BETWEEN RESPECTIVE COLLECTORS OF SAID FIRST AND SECOND TRANSISTORS AND OPERATIVE TO FORWARD BIAS THE COLLECTOR-BASE JUNCTION OF SAID SECOND TRANSISTOR TO CAUSE SAID SECOND TRANSISTOR TO OPERATE IN SATURATION OR AS CLOSE TO SATURATION AS POSSIBLE AND THEREBY REDUCE POWER DISSIPATION THEREIN.

References Cited (Backward Citations)

US2663806A Cited
US2844667A Cited
US2887542A Cited
US2968748A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1968-10-04 1969-04-05 1969-10-05 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1972-10-04 1973-04-05 1973-10-05 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1976-10-04 1977-04-05 1977-10-05 $7700.00 Window Closed / Lapsed

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