Patent US4011518A successfully refreshed from Google Patents.
US4011518A
Expired / Lapsed
US
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Microwave GaAs FET amplifier circuit
Assignee: United States Department of the Navy
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Filing: 1975-10-28
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Granted: 1977-03-08
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Expires: 1995-10-28
Abstract
Abstract A network is coupled to the gate electrode of a FET for generating a negative gate electrode voltage having a selected nominal value for minimizing intermodulation distortion of the FET and/or a value varying with respect to the nominal value directly proportional to temperature changes to provide a constant gain for the FET.
Inventors
- 👤 James A. Irvine
- 👤 Peter Torrione
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 11:52
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/189; H03F3/19; H03F3/193; H03F3/1935; H03F1/00; H03F1/30; H03F1/306
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
126 words
A microwave field effect transistor (FET) amplifier circuit to provide a constant gain for said FET with varying temperature and to minimize intermodulation distortion of said FET comprising: a first source of radio frequency (RF) signal; a RF signal output; a second source of positive drain electrode operating voltage; a microwave FET having a gate electrode coupled to said first source, a drain electrode coupled to said output and said second source and a source electrode directly coupled to ground; and a network coupled to said gate electrode, said network generating a negative gate electrode voltage having a selected nominal value to minimize said intermodulation distortion and a value varying with respect to said nominal value directly proportional to temperature changes to provide said constant gain.
Claim 2
Dependent Claim
126 words
A microwave field effect transistor (FET) amplifier circuit to provide a constant gain for said FET with varying temperature and to minimize intermodulation distortion of said FET comprising: a first source of radio frequency (RF) signal; a RF signal output; a second source of positive drain electrode operating voltage; a microwave FET having a gate electrode coupled to said first source, a drain electrode coupled to said output and said second source and a source electrode directly coupled to ground; and a network coupled to said gate electrode, said network generating a negative gate electrode voltage having a selected nominal value to minimize said intermodulation distortion and a value varying with respect to said nominal value directly proportional to temperature changes to provide said constant gain.
Claim 3
Dependent Claim
25 words
A circuit according to claim 1, wherein said selected nominal value is selected to minimize third order distortion products to enable minimizing said intermodulation distortion.
Claim 4
Dependent Claim
17 words
A circuit according to claim 1, wherein said microwave FET is a n-channel gallium arsenide microwave FET.
Claim 5
Dependent Claim
39 words
A circuit according to claim 3, further including a first RF impedance matching circuit coupled to said gate electrode, said first source and said network to couple said RF signal and said gate electrode voltage to said gate electrode.
Claim 6
Dependent Claim
52 words
A circuit according to claim 4, further including a first zener diode coupled between the output of said network and ground, a first feedthrough capacitor coupled to the output of said network, and a first RF choke coupled between said first feedthrough capacitor and the input of said first impedance matching circuit.
Claim 7
Dependent Claim
43 words
A circuit according to claim 5, further including a second RF impedance matching circuit coupled to said drain electrode, said second source and said output to couple said RF signal to said output and said drain electrode operating voltage to said drain electrode.
Claim 8
Dependent Claim
53 words
A circuit according to claim 6, further including a second diode coupled between the output of said second source and ground, a second feedthrough capacitor coupled to the output of said second source, and a second RF choke coupled between said second feedthrough capacitor and the output of said second impedance matching circuit.
Claim 9
Dependent Claim
106 words
A circuit according to claim 7, wherein said network includes a third source of regulated negative voltage, a resistor having one terminal coupled to the output of said third source, a first variable resistor coupled between the other terminal of said resistor and ground, a second variable resistor coupled to the other terminal of said resistor, said first and second variable resistor cooperating to select said selected nominal value, a third variable resistor having a resistance inversely proportional to temperature coupled in series with said second variable resistor and ground to provide said value varying with respect to said nominal value directly proportional to temperature changes.
Claim 10
Dependent Claim
14 words
A circuit according to claim 8, wherein said third variable resistor is a thermistor.
Claim 11
Dependent Claim
106 words
A circuit according to claim 1, wherein said network includes a third source of regulated negative voltage, a resistor having one terminal coupled to the output of said third source, a first variable resistor coupled between the other terminal of said resistor and ground, a second variable resistor coupled to the other terminal of said resistor, said first and second variable resistor cooperating to select said selected nominal value, a third variable resistor having a resistance inversely proportional to temperature coupled in series with said second variable resistor and ground to provide said value varying with respect to said nominal value directly proportional to temperature changes.
Claim 12
Dependent Claim
14 words
A circuit according to claim 10, wherein said third variable resistor is a thermistor.
References Cited (Backward Citations)
US3382445A
Cited
US3517325A
Cited
US3541234A
Cited
US3525050A
Cited
US3514710A
Cited
US3716730A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1980-03-07 | 1980-09-06 | 1981-03-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1984-03-07 | 1984-09-06 | 1985-03-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1988-03-07 | 1988-09-06 | 1989-03-08 | $7700.00 | Window Closed / Lapsed |