Semiconductor device having multilayered electrode structure

Claim 2

A semiconductor high frequency high power device having a multilayered electrode structure comprising a semiconductor substrate of one conductivity type, a first base region of the opposite conductivity type formed on one surface of said substrate, a second single area emitter region of the same conductivity type as the substrate formed on said first region, a first insulating film for covering and protecting parts of pn junctions formed between said first region and said substrate that are exposed on the surface of said substrate, a first conductive layer formed on said first insulating film and having ohmic contact with said first region through holes opened in said first insulating film, a second insulating film covering the upper surface of said first conductive layer leaving at least a part of the peripheral parts of said first conductive layer uncovered, and a second conductive layer of high resistivity penetrating through said first insulating film and said second insulating film at a plurality of spaced points and having ohmic contact with said second single area region emitter forming resistors separately contacting said single area of the second region at multiple points, without any said resistor extending across said single area region to the borders thereof, and a metal layer on nearly the entire outer surface of said second conductive layer and constituting an electrode sufficiently thick and low in resistivity that the entire outer surface of the second conductive layer parallel to the surface of the substrate is of substantially the same potential during operation, whereby the voltage drop in the second conductive layer during operation is perpendicular to the substrate to prevent local crowding of current, and whereby when current flows in the semiconductor device a uniform potential distribution is produced on the emitter semiconductor region as a result of the currents flowing in said resistors.

Claim 3

A device as in claim 1, wherein the second conductive layer is of material with a resistivity at least above about 10 - 4 Ωcm.

Claim 4

A semiconductor device comprising a semiconductor wafer of one conduction type, a first semiconductor region formed on one surface of said substrate and of the reverse conduction type of said substrate, a second single area semiconductor emitter region formed in said first region and of the same conduction type as said substrate, a first insulating layer covering and protecting parts of pn junctions formed between said two regions and between said first region and said substrate that are exposed on the surface of said substrate, a first conductive layer formed on said insulating layer and having ohmic contact with said first region through first holes in said first insulating layer, a second conductive layer disengaged from said first conductive layer and having ohmic contact with the second single area semiconductor region through a plurality of spaced second holes in said first insulating layer, a second insulating layer interposed between said first and said second conductive layer covering the upper surface of said first conductive layer leaving at least a part of the peripheral parts of said first conductive layer uncovered, whereby second holes in said first insulating layer are aligned with a corresponding number of holes in said first conductive layer and in said second insulating layer, said second conductive layer having portions having a high resistivity penetrating via the second holes through the subsequent layers such that a corresponding number of resistors connected with each other in said second conductive layer is produced substantially perpendicular to the surface of said substrate in contact with the second single area of said semiconductor region, without any said resistor extending across said single area to the borders thereof, whereby when current flows in the semiconductor device a uniform potential distribution is produced on said emitter region as a result of the currents flowing in said resistors.

Claim 5

A semiconductor device comprising a semiconductor wafer of one conduction type, a first semiconductor region formed on one surface of said substrate and of the reverse conduction type of said substrate, a second single area semiconductor emitter region formed in said first region and of the same conduction type as said substrate, a first insulating layer covering and protecting parts of pn junctions formed between said two regions and between said first region and said substrate that are exposed on the surface of said substrate, a first conductive layer formed on said insulating layer and having ohmic contact with said first region through first holes in said first insulating layer, a second conductive layer disengaged from said first conductive layer and having ohmic contact with the second single area semiconductor region through a plurality of spaced second holes in said first insulating layer, a second insulating layer interposed between said first and said second conductive layer covering the upper surface of said first conductive layer leaving at least a part of the peripheral parts of said first conductive layer uncovered, whereby second holes in said first insulating layer are aligned with a corresponding number of holes in said first conductive layer and in said second insulating layer, said second conductive layer having portions having a high resistivity penetrating via the second holes through the subsequent layers such that a corresponding number of resistors connected with each other in said second conductive layer is produced substantially perpendicular to the surface of said substrate in contact with the second single area of said semiconductor region, without any said resistor extending across said single area to the borders thereof, whereby when current flows in the semiconductor device a uniform potential distribution is produced on said emitter region as a result of the currents flowing in said resistors.