Patent US3993869A successfully refreshed from Google Patents.
US3993869A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Amplifying circuit for use with a high impedance source transducer
Assignee: Sony Corp
•
Filing: 1974-10-10
•
Granted: 1976-11-23
•
Expires: 1994-10-10
Abstract
Abstract An amplifying circuit for use with a transducer includes a pair of field-effect transistors which are of different conductive types from each other and each of which has gate, drain and source electrodes. The gate electrodes of the field-effect transistors are connected to each other and are further connected to an output terminal of an electrostatic type mechanical-electrical transducer, while the source electrodes of the field-effect transistors are connected to each other and are further connected to an output circuit. One of the drain electrodes is connected to a voltage source and the other drain electrode is connected to the circuit ground. High input impedance is maintained by using no gate resistor at the input, and using a current-sourced source-follower secondstage. Source resistors improve linear performance.
Inventors
- 👤 Osamu Kono
- 👤 Takeshi Matsudaira
- 👤 Makoto Ishikawa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 20:54
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/181; H03F3/183; H03F3/185; H03F3/1855
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
253 words
An amplifying circuit for use with a signal source comprising first and second field-effect transistors which are of different conductive types, and each of which has gate, drain and source electrodes, the gate electrodes of the first and second field-effect transistors being connected to each other, a pair of resistors in series connecting the source electrodes of the first and second field-effect transistors to each other in a source follower configuration so as to present a low output impedance, means connecting the signal source between the interconnected gate electrodes of the first and second field-effect transistors and the drain electrode of the second field-effect transistor, said first and second field effect being selected to have small values of drain-source current in the absence of any gate-source bias, a third transistor which has control, output and common electrodes, means connecting said control electrode to said resistors at a connection point between the latter, a constant current source connected to said output electrode, means for supplying power to said drain electrode of said first field-effect transistor and to said common electrode of the third transistor, an output circuit connected between said output electrode of the third transistor and said drain electrode of the second field-effect transistor, said third transistor and said constant current source cooperating to provide a high load impedance for said first and second field effect transistors, and said third transistor being selected to have a relatively high common to output electrode current in the absence of any control to output electrode bias.
Claim 2
Dependent Claim
253 words
An amplifying circuit for use with a signal source comprising first and second field-effect transistors which are of different conductive types, and each of which has gate, drain and source electrodes, the gate electrodes of the first and second field-effect transistors being connected to each other, a pair of resistors in series connecting the source electrodes of the first and second field-effect transistors to each other in a source follower configuration so as to present a low output impedance, means connecting the signal source between the interconnected gate electrodes of the first and second field-effect transistors and the drain electrode of the second field-effect transistor, said first and second field effect being selected to have small values of drain-source current in the absence of any gate-source bias, a third transistor which has control, output and common electrodes, means connecting said control electrode to said resistors at a connection point between the latter, a constant current source connected to said output electrode, means for supplying power to said drain electrode of said first field-effect transistor and to said common electrode of the third transistor, an output circuit connected between said output electrode of the third transistor and said drain electrode of the second field-effect transistor, said third transistor and said constant current source cooperating to provide a high load impedance for said first and second field effect transistors, and said third transistor being selected to have a relatively high common to output electrode current in the absence of any control to output electrode bias.
Claim 3
Dependent Claim
20 words
An amplifying circuit as recited in claim 1 wherein the signal source is a mechanical-electrical transducer of the electrostatic type.
Claim 4
Dependent Claim
22 words
An amplifying circuit as recited in claim 1 wherein the output circuit comprises a series connection of a capacitor and a transformer.
Claim 5
Dependent Claim
94 words
An amplifying circuit as recited in claim 1; wherein the third transistor is a field-effect transistor having gate, drain and source electrodes constituting said control, common and output electrodes, respectively, and the constant current source includes a fourth field-effect transistor having gate drain and source electrodes, means connecting the source electrode of the third field-effect transistor and the drain electrode of the fourth field-effect transistor to each other, and means connecting the gate and source electrodes of the fourth field-effect transistor to each other and to the drain electrode of the second field-effect transistor.
Claim 6
Dependent Claim
110 words
An amplifying circuit as recited in claim 1; wherein the third transistor is a field-effect transistor having gate, drain and source electrodes constituting said control, common and output electrodes, respectively; and the constant current source includes a bipolar transistor having base, collector and emitter electrodes, a bias voltage source connected to the base electrode of the bipolar transistor, means connecting the source electrode of the third field-effect transistor to one of the emitter and collector electrodes of the bipolar transistor and to the output circuit, and means connecting the other of the emitter and collector electrodes of the bipolar transistor to the drain electrode of the second field effect transistor.
Claim 7
Dependent Claim
105 words
An amplifying circuit as recited in claim 1; wherein the third transistor is a bipolar transistor having base, collector and emitter electrodes which constitute said control, common and output electrodes, respectively; and the constant current source includes a fourth transistor which is a field-effect transistor having gate, drain and source electrodes, means connecting the emitter electrode of the bipolar third transistor and the drain electrode of the fourth field effect transistor to each other and to the output circuit, and means connecting the gate and source electrodes of the fourth field-effect transistor to each other and to the drain electrode of the second field-effect transistor.
Claim 8
Dependent Claim
51 words
An amplifying circuit as recited in claim 1; wherein said third transistor is a field-effect transistor having gate, drain and source electrodes constituting said control, common and output electrodes, respectively, and said third field-effect transistor has a large value of drain-source current in the absence of any gate-source bias applied thereto.
Claim 9
Dependent Claim
38 words
An amplifying circuit as recited in claim 1; wherein said third transistor is a bipolar transistor having base, collector and emitter electrodes constituting said control, common and output electrodes, and said third transistor has a large collector current.
References Cited (Backward Citations)
US3300585A
Cited
US3378783A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1979-11-23 | 1980-05-24 | 1980-11-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1983-11-23 | 1984-05-24 | 1984-11-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1987-11-23 | 1988-05-24 | 1988-11-23 | $7700.00 | Window Closed / Lapsed |