US3988618A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Electrical angle delay circuit
Assignee: Motors Liquidation Co
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Filing: 1974-11-01
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Granted: 1976-10-26
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Expires: 1994-11-01
Abstract
Abstract A Schmitt trigger circuit produces synchronizing signals during and of a pulse width equal to the positive half cycles of an alternating current input signal. A monostable multivibrator circuit is triggered to the alternate state by the leading edge of each synchronizing signal and the resulting series of alternate state output signals charges a capacitor to a direct current potential level range signal directly proportional to the frequency of the input signal. A direct current potential ramp timing signal generating circuit, which is reset and disenabled by the leading edge and enabled by the trailing edge of the synchronizing signals, generates a timing signal which increases linearly in potential level at a rate determined by the range signal. A potential level detector circuit responsive to the timing signal and a delay signal of a selectable direct current potential level produces an output signal when the potential level of the timing signal increases to that of the delay signal.
Inventors
- 👤 Curtis D. Munden
- 👤 Robert E. Campbell
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 15:33
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/13; H03K5/153; H03K2005/00286
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
233 words
An electrical angle delay circuit for producing an output signal which is delayed the same selectable number of electrical degrees from the positive to negative polarity zero crossover point of each cycle of all frequencies of a variable frequency alternating current input signal comprising: circuit means responsive to said alternating current input signal for producing a direct current potential synchronizing signal having leading and trailing edges corresponding to the negative to positive polarity zero crossover point and to the positive to negative polarity zero crossover point, respectively, of each cycle of said alternating current input signal; circuit means responsive to said leading edge of said synchronizing signals for producing a range signal of a direct potential level directly proportional to the frequency of said alternating current input signal; timing circuit means arranged to be electrically influenced by said range signal for producing a direct current potential ramp timing signal which is initiated at the positive to negative polarity zero crossover point of each cycle of said alternating current input signal and increases linearly in potential level at a rate determined by the potential level of said range signal; means for producing a delay signal of a selectable direct current potential level; and circuit means responsive to said timing signal and said delay signal for producing an output signal when the potential level of said timing signal increases to that of said delay signal.
Claim 2
Dependent Claim
233 words
An electrical angle delay circuit for producing an output signal which is delayed the same selectable number of electrical degrees from the positive to negative polarity zero crossover point of each cycle of all frequencies of a variable frequency alternating current input signal comprising: circuit means responsive to said alternating current input signal for producing a direct current potential synchronizing signal having leading and trailing edges corresponding to the negative to positive polarity zero crossover point and to the positive to negative polarity zero crossover point, respectively, of each cycle of said alternating current input signal; circuit means responsive to said leading edge of said synchronizing signals for producing a range signal of a direct potential level directly proportional to the frequency of said alternating current input signal; timing circuit means arranged to be electrically influenced by said range signal for producing a direct current potential ramp timing signal which is initiated at the positive to negative polarity zero crossover point of each cycle of said alternating current input signal and increases linearly in potential level at a rate determined by the potential level of said range signal; means for producing a delay signal of a selectable direct current potential level; and circuit means responsive to said timing signal and said delay signal for producing an output signal when the potential level of said timing signal increases to that of said delay signal.
Claim 3
Dependent Claim
260 words
An electrical angle delay circuit for producing an output signal which is delayed the same selectable number of electrical degrees from the positive to negative polarity zero crossover point of each cycle of all frequencies of a variable frequency alternating current input signal comprising: circuit means responsive to said alternating current input signal for producing a direct current potential synchronizing signal having leading and trailing edges corresponding to the negative to positive polarity zero crossover point and to the positive to negative polarity zero crossover point, respectively, of each cycle of said alternating current input signal; circuit means responsive to said leading edge of said synchronizing signals for producing a range signal of a direct current potential level directly proportional to the frequency of said alternating current input signal; timing circuit means arranged to be electrically influenced by said range signal for producing a direct current potential ramp timing signal which is initiated at the positive to negative polarity zero crossover point of each cycle of said alternating current input signal and increases linearly in potential level at a rate determined by the potential level of said range signal; means for producing a delay signal of a selectable direct current potential level; circuit means responsive to said timing signal and said delay signal for producing an output signal when the potential level of said timing signal increases to a direct current potential level equal to that of said delay signal; and means for selectively adjusting the rate at which said direct current potential ramp timing signal increases in potential level.
Claim 4
Dependent Claim
260 words
An electrical angle delay circuit for producing an output signal which is delayed the same selectable number of electrical degrees from the positive to negative polarity zero crossover point of each cycle of all frequencies of a variable frequency alternating current input signal comprising: circuit means responsive to said alternating current input signal for producing a direct current potential synchronizing signal having leading and trailing edges corresponding to the negative to positive polarity zero crossover point and to the positive to negative polarity zero crossover point, respectively, of each cycle of said alternating current input signal; circuit means responsive to said leading edge of said synchronizing signals for producing a range signal of a direct current potential level directly proportional to the frequency of said alternating current input signal; timing circuit means arranged to be electrically influenced by said range signal for producing a direct current potential ramp timing signal which is initiated at the positive to negative polarity zero crossover point of each cycle of said alternating current input signal and increases linearly in potential level at a rate determined by the potential level of said range signal; means for producing a delay signal of a selectable direct current potential level; circuit means responsive to said timing signal and said delay signal for producing an output signal when the potential level of said timing signal increases to a direct current potential level equal to that of said delay signal; and means for selectively adjusting the rate at which said direct current potential ramp timing signal increases in potential level.
Claim 5
Dependent Claim
293 words
An electrical angle delay circuit for producing an output signal which is delayed the same selectable number of electrical degrees from the positive to negative polarity zero crossover point of each cycle of all frequencies of a variable frequency alternating current input signal comprising: circuit means responsive to said alternating current input signal for producing a direct current potential synchronizing signal having leading and trailing edges corresponding to the negative to positive polarity zero crossover point and to the positive to negative polarity zero crossover point, respectively, of each cycle of said alternating current input signal; circuit means responsive to said leading edge of said synchronizing signals for producing a range signal of a direct current potential level directly proportional to the frequency of said alternating current input signal; timing circuit means arranged to be electrically influenced by said range signal for producing a direct current potential ramp timing signal which is initiated at the positive to negative polarity zero crossover point of each cycle of said alternating current input signal and increases linearly in potential level at a rate determined by the potential level of said range signal; circuit means responsive to the presence of each of said synchronizing signals for resetting and disenabling said timing circuit means and to the absence of said synchronizing signals for enabling said timing circuit means; means for producing a delay signal of a selectable direct current potential level; circuit means responsive to said timing signal and said delay signal for producing an output signal when the potential level of said timing signal increases to a direct current potential level equal to that of said delay signal; means for selectively adjusting the rate at which said direct current potential ramp timing signal increases in potential level.
Claim 6
Dependent Claim
293 words
An electrical angle delay circuit for producing an output signal which is delayed the same selectable number of electrical degrees from the positive to negative polarity zero crossover point of each cycle of all frequencies of a variable frequency alternating current input signal comprising: circuit means responsive to said alternating current input signal for producing a direct current potential synchronizing signal having leading and trailing edges corresponding to the negative to positive polarity zero crossover point and to the positive to negative polarity zero crossover point, respectively, of each cycle of said alternating current input signal; circuit means responsive to said leading edge of said synchronizing signals for producing a range signal of a direct current potential level directly proportional to the frequency of said alternating current input signal; timing circuit means arranged to be electrically influenced by said range signal for producing a direct current potential ramp timing signal which is initiated at the positive to negative polarity zero crossover point of each cycle of said alternating current input signal and increases linearly in potential level at a rate determined by the potential level of said range signal; circuit means responsive to the presence of each of said synchronizing signals for resetting and disenabling said timing circuit means and to the absence of said synchronizing signals for enabling said timing circuit means; means for producing a delay signal of a selectable direct current potential level; circuit means responsive to said timing signal and said delay signal for producing an output signal when the potential level of said timing signal increases to a direct current potential level equal to that of said delay signal; means for selectively adjusting the rate at which said direct current potential ramp timing signal increases in potential level.
Claim 7
Dependent Claim
258 words
An electrical angle delay circuit for producing an output signal which is delayed the same selectable number of electrical degrees from the positive to negative polarity zero crossover point of each cycle of all frequencies of a variable frequency alternating current input signal comprising: trigger circuit means responsive to said alternating current input signal for producing a direct current potential synchronizing signal having leading and trailing edges corresponding to the negative to positive polarity zero crossover point and to the positive to negative polarity zero crossover point, respectively, of each cycle of said alternating current input signal; a resistor; a capacitor; circuit means including a monostable multivibrator circuit and said resistor and capacitor in series for producing a range signal of a direct current potential level directly proportional to the frequency of said alternating current input signal in response to said leading edge of said synchronizing signals; timing circuit means arranged to be electrically influenced by said range signal for producing a direct current potential ramp timing signal which is initiated at the positive to negative polarity zero crossover point of each cycle of said alternating current input signal and increases linearly in potential level at a rate determined by the potential level of said range signal; means for producing a delay signal of a selectable direct current potential level; circuit means responsive to said timing signal and said delay signal for producing an output signal when the potential level of said timing signal increases to a direct current potential level equal to that of said delay signal.
Claim 8
Dependent Claim
258 words
An electrical angle delay circuit for producing an output signal which is delayed the same selectable number of electrical degrees from the positive to negative polarity zero crossover point of each cycle of all frequencies of a variable frequency alternating current input signal comprising: trigger circuit means responsive to said alternating current input signal for producing a direct current potential synchronizing signal having leading and trailing edges corresponding to the negative to positive polarity zero crossover point and to the positive to negative polarity zero crossover point, respectively, of each cycle of said alternating current input signal; a resistor; a capacitor; circuit means including a monostable multivibrator circuit and said resistor and capacitor in series for producing a range signal of a direct current potential level directly proportional to the frequency of said alternating current input signal in response to said leading edge of said synchronizing signals; timing circuit means arranged to be electrically influenced by said range signal for producing a direct current potential ramp timing signal which is initiated at the positive to negative polarity zero crossover point of each cycle of said alternating current input signal and increases linearly in potential level at a rate determined by the potential level of said range signal; means for producing a delay signal of a selectable direct current potential level; circuit means responsive to said timing signal and said delay signal for producing an output signal when the potential level of said timing signal increases to a direct current potential level equal to that of said delay signal.
Claim 9
Dependent Claim
312 words
An electrical angle delay circuit for producing an output signal which is delayed the same selectable number of electrical degrees from the positive to negative polarity zero crossover point of each cycle of all frequencies of a variable frequency alternating current input signal comprising: trigger circuit means responsive to said alternating current input signal for producing a direct current potential synchronizing signal having leading and trailing edges corresponding to the negative to positive polarity zero crossover point and to the positive to negative polarity zero crossover point, respectively, of each cycle of said alternating current input signal; a resistor; a capacitor; circuit means including a monostable multivibrator circuit and said resistor and capacitor in series for producing a range signal of a direct current potential level directly proportional to the frequency of said alternating current input signal in response to said leading edge of said synchronizing signals; timing circuit means arranged to be electrically influenced by said range signal for producing a direct current potential ramp timing signal which is initiated at the positive to negative polarity zero crossover point of each cycle of said alternating current input signal and increases linearly in potential level at a rate determined by the potential level of said range signal; circuit means responsive to the presence of each of said synchronizing signals for resetting and disenabling said timing circuit means and to the absence of said synchronizing signals for enabling said timing circuit means; means for producing a delay signal of a selectable direct current potential level; circuit means responsive to said timing signal and said delay signal for producing an output signal when the potential level of said timing signal increases to a direct current potential level equal to that of said delay signal; and means for selectively adjusting the rate at which said direct current potential ramp timing signal increases in potential level.
Claim 10
Dependent Claim
312 words
An electrical angle delay circuit for producing an output signal which is delayed the same selectable number of electrical degrees from the positive to negative polarity zero crossover point of each cycle of all frequencies of a variable frequency alternating current input signal comprising: trigger circuit means responsive to said alternating current input signal for producing a direct current potential synchronizing signal having leading and trailing edges corresponding to the negative to positive polarity zero crossover point and to the positive to negative polarity zero crossover point, respectively, of each cycle of said alternating current input signal; a resistor; a capacitor; circuit means including a monostable multivibrator circuit and said resistor and capacitor in series for producing a range signal of a direct current potential level directly proportional to the frequency of said alternating current input signal in response to said leading edge of said synchronizing signals; timing circuit means arranged to be electrically influenced by said range signal for producing a direct current potential ramp timing signal which is initiated at the positive to negative polarity zero crossover point of each cycle of said alternating current input signal and increases linearly in potential level at a rate determined by the potential level of said range signal; circuit means responsive to the presence of each of said synchronizing signals for resetting and disenabling said timing circuit means and to the absence of said synchronizing signals for enabling said timing circuit means; means for producing a delay signal of a selectable direct current potential level; circuit means responsive to said timing signal and said delay signal for producing an output signal when the potential level of said timing signal increases to a direct current potential level equal to that of said delay signal; and means for selectively adjusting the rate at which said direct current potential ramp timing signal increases in potential level.
References Cited (Backward Citations)
US3333110A
Cited
US3403268A
Cited
US3486067A
Cited
US3486043A
Cited
US3571626A
Cited
US3581214A
Cited
US3753012A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1979-10-26 | 1980-04-26 | 1980-10-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1983-10-26 | 1984-04-26 | 1984-10-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1987-10-26 | 1988-04-26 | 1988-10-26 | $7700.00 | Window Closed / Lapsed |