US3753012A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Circuit for providing precise time delay
Assignee: Motorola Solutions Inc
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Filing: 1972-02-17
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Granted: 1973-08-14
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Expires: 1992-02-17
Abstract
Abstract Integrated circuit structure responsive to being triggered to produce output signals at precise time intervals following points in the operation of a device. The circuit is adapted for accurate repeating operation, and provides a plurality of signals at different precise time delays. A discrete capacitor is discharged to a predetermined value (reset) by a voltage regulator at each triggering of the circuit, and at the end of a short time starts to charge so that the voltage thereacross forms a repeatable exponential ramp. A plurality of comparators are coupled to the capacitor and each produces an output when the capacitor voltage reaches the reference voltage for that comparator. The triggering may be provided by a circuit including a reset capacitor which responds to the change of levels of a signal derived from the device to alternately charge and discharge the reset capacitor. The voltage across the reset capacitor is applied to a pair of comparators which produce current pulses during the beginning of the charge and discharge periods of the reset capacitor for operating the voltage regulator.
Inventors
- 👤 T Frederiksen
- 👤 W Davis
- 👤 R Russell
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 04:27
CPC Classifications
F; F02; F02D; F02D41/00; F02D41/30; F02D41/32; H; H03; H03K; H03K5/00; H03K5/13
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
174 words
A time delay generator including in combination, capacitor means, means connected to said capacitor means for charging the same to provide a ramp voltage thereacross which increases at a predetermined rate, a voltage regulator coupled to said capacitor means including reference means providing a fixed reference voltage, said regulator including a differential amplifier having a first input connected to said reference means and a second input connected to said capacitor means, and switch coupled to said differential amplifier and to said capacitor means and being selectively rendered operative by said differential amplifier to discharge said capacitor means to said fixed reference voltage; control means coupled to said voltage regulator for causing the same to operate at recurring time intervals to discharge said capacitor means and to be inoperative between such intervals whereby said capacitor means charges to provide the ramp voltage, and comparator means coupled to said capacitor means and operative to produce an output signal in response to a voltage across said capacitor means which reaches a particular voltage above said reference voltage.
Claim 2
Dependent Claim
174 words
A time delay generator including in combination, capacitor means, means connected to said capacitor means for charging the same to provide a ramp voltage thereacross which increases at a predetermined rate, a voltage regulator coupled to said capacitor means including reference means providing a fixed reference voltage, said regulator including a differential amplifier having a first input connected to said reference means and a second input connected to said capacitor means, and switch coupled to said differential amplifier and to said capacitor means and being selectively rendered operative by said differential amplifier to discharge said capacitor means to said fixed reference voltage; control means coupled to said voltage regulator for causing the same to operate at recurring time intervals to discharge said capacitor means and to be inoperative between such intervals whereby said capacitor means charges to provide the ramp voltage, and comparator means coupled to said capacitor means and operative to produce an output signal in response to a voltage across said capacitor means which reaches a particular voltage above said reference voltage.
Claim 3
Dependent Claim
43 words
A time delay generator in accordance with claim 1 wherein said control means produces recurring pulses having fixed widths for rendering said voltage regulator operative for the duration of each pulse, with the duty cycle of said pulses being less than 50 percent.
Claim 4
Dependent Claim
33 words
A time delay generator in accordance with claim 2 wherein said pulses have a width to operate said voltage regulator for a sufficient time to eliminate the dielectric storage in said capacitor means.
Claim 5
Dependent Claim
39 words
A time delay generator in accordance with claim 1 wherein said comparator means includes a plurality of comparator cirucits, with each circuit being operative to provide an output signal in response to a different voltage across said capacitor means.
Claim 6
Dependent Claim
196 words
A time delay generator including in combination, capacitor means, means connected to said capacitor means for charging the same to provide a ramp voltage thereacross which increases at a predetermined rate, a voltage regulator coupled to said capacitor means including reference means providing a fixed reference voltage, said regulator being selectively rendered operative to discharge said capacitor means to said fixed reference voltage; control means including switching means for producing recurring voltage changes, a reset capacitor, means coupled to said switching means for charging and discharging said reset capacitor at alternate voltage changes, and comparator circuit means coupled to said reset capacitor for producing pulses of substantially constant width which are initiated at said voltage changes, means coupling said comparator circuit means to said voltage regulator to apply said constant width pulses thereto to operate said regulator at recurring time intervals to discharge said capacitor means and to be inoperative between such intervAls whereby said capacitor means charges to provide the ramp voltage, and comparator means coupled to said capacitor means and operative to produce an output signal in response to a voltage across said capacitor means which reaches a particular voltage above said reference voltage.
Claim 7
Dependent Claim
196 words
A time delay generator including in combination, capacitor means, means connected to said capacitor means for charging the same to provide a ramp voltage thereacross which increases at a predetermined rate, a voltage regulator coupled to said capacitor means including reference means providing a fixed reference voltage, said regulator being selectively rendered operative to discharge said capacitor means to said fixed reference voltage; control means including switching means for producing recurring voltage changes, a reset capacitor, means coupled to said switching means for charging and discharging said reset capacitor at alternate voltage changes, and comparator circuit means coupled to said reset capacitor for producing pulses of substantially constant width which are initiated at said voltage changes, means coupling said comparator circuit means to said voltage regulator to apply said constant width pulses thereto to operate said regulator at recurring time intervals to discharge said capacitor means and to be inoperative between such intervAls whereby said capacitor means charges to provide the ramp voltage, and comparator means coupled to said capacitor means and operative to produce an output signal in response to a voltage across said capacitor means which reaches a particular voltage above said reference voltage.
Claim 8
Dependent Claim
108 words
A time delay generator in accordance with claim 5 wherein said switching means produces a voltage which alternates between first and second levels in response to trigger signals applied thereto, said means coupled to said switching means charges said reset capacitor in response to said first voltage level and discharges said reset capacitor in response to said second voltage level, and said comparator circuit means includes first and second comparator circuits coupled to said reset capacitor, with said first comparator circuit producing a pulse in response to charge of said reset capacitor, and said second comparator circuit producing a pulse in response to discharge of said reset capacitor.
Claim 9
Dependent Claim
53 words
A time delay generator in accordance with claim 6 wherein said circuit means includes a first circuit connected to said reset capacitor for charging the same at a fixed rate, and a second circuit controlled by said switching means and connected to said reset capacitor for discharging the same at said fixed rate.
Claim 10
Dependent Claim
101 words
A time delay generator in accordance with claim 6 wherein said reset capacitor is charged to a fixed voltage level, and said comparator circuits are connected to said switching means and each has a reference input for receiving a reference voltage equal to one half said fixed voltage level, said first comparator producing a pulse initiated when said capacitor starts to charge and terminating when said capacitor charges to one half said fixed level, and said second comparator circuit producing a pulse initiated when said capacitor starts to discharge and terminated when said capacitor discharges to one half said fixed level.
Claim 11
Dependent Claim
124 words
A pulse generator for producing pulses of constant width in response to trigger signals, including in combination, switching means for producing a voltage which alternates between first and second levels in response to trigger signals applied thereto, capacitor means, circuit means coupled to said capacitor means and to said switching means for charging said capacitor means in response to said first voltage level and discharging said capacitor means in response to said second voltage level, and first and second comparator circuits coupled to said capacitor means, with said first comparator circuit producing a pulse of fixed width in response to charge of said capacitor means, and said second comparator producing a pulse of the same width in response to discharge of said capacitor means.
Claim 12
Dependent Claim
124 words
A pulse generator for producing pulses of constant width in response to trigger signals, including in combination, switching means for producing a voltage which alternates between first and second levels in response to trigger signals applied thereto, capacitor means, circuit means coupled to said capacitor means and to said switching means for charging said capacitor means in response to said first voltage level and discharging said capacitor means in response to said second voltage level, and first and second comparator circuits coupled to said capacitor means, with said first comparator circuit producing a pulse of fixed width in response to charge of said capacitor means, and said second comparator producing a pulse of the same width in response to discharge of said capacitor means.
Claim 13
Dependent Claim
129 words
A pulse generator in accordance with claim 9 wherein said circuit means acts to charge said capacitor means to a fixed voltage level, and wherein said first and second comparator circuits are coupled to said switching means and are rendered operative thereby and each has a reference input for receiving a reference voltage equal to one half said fixed voltage level, said first comparator circuit being rendered operative by said switching means to produce a pulse initiated when said capacitor means starts to charge and terminating when said capacitor means charges to the reference voltage, and said second comparator circuit being rendered operative by said switching means to produce a pulse initiated when said capacitor means starts to discharge and terminating when said capacitor discharges to the reference voltage.
Claim 14
Dependent Claim
104 words
A pulse generator in accordance with claim 9 wherein said circuit means includes a first portion forming a charging path for applying fixed charging current to said capacitor means, a second portion for limiting the voltage across said capacitor means to a fixed level, and a third portion controlled by said switching means and selectively operated to form a discharge path for said capacitor means, said third portion conducting current which is equal to two times said fixed charging current whereby said discharge path conducts said charging current and additional current to discharge said capacitor means which is equal to said fixed charging current.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-08-13 | 1977-02-12 | 1977-08-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-08-13 | 1981-02-12 | 1981-08-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-08-13 | 1985-02-12 | 1985-08-14 | $7700.00 | Window Closed / Lapsed |