US3984832A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Series current analog to digital converter
Assignee: Motorola Solutions Inc
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Filing: 1975-06-06
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Granted: 1976-10-05
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Expires: 1995-06-06
Abstract
Abstract A series current steering high speed analog-to-digital converter. The converter includes means for providing n number of weighted current sources and drains of having 1/2, 1/4, 1/8, - - - 1/2 n of a reference current, I r , wherein n represents an integer number, n diodes bridge circuits connected in series, n comparators coupled to corresponding bridging arms of the bridge circuits. The current sources and drains, the bridge circuits and the comparators are operatively coupled to form n sections in series to steer the currents therethrough so that the first section compares the amplitude of the input current with 1/2 of the reference current and generates the most significant bit, the second section compares the absolute valve of the difference between the input current and the 1/2 to 1/4 of the reference current for generating the second most significant bit, and so on, till the n bit digital word output is formed from the input current. Advantageously, the present series current steering analog-to-digital converter eliminates the need for sample and hold circuitry and increases the speed of the conversion by an order of magnitude compared to conventional steering circuit and can be rendered in a monolithic analog-to-digital converter structure.
Inventors
- 👤 Tim W. Henry
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 16:04
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/12; H03M1/34; H03M1/38; H03M1/44; H03M1/445
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
174 words
An analog-to-digital converter for converting an input current into an n bit digital word output n being an integer number, comprising: means for providing n number of pairs of weighted current sources and drains of 1/2, 1/4, 1/8, . . . 1/2 n amplitudes of that of a reference current, I r , n diode bridge circuits connected in a concentric series arrangement, n comparators coupled to corresponding bridging arms of said n bridge circuits, wherein said current sources and drains, said bridge circuits and comparators, are operatively coupled into n sections in series to steer the currents therethrough so that the first section compares the amplitude of the input current with 1/2 of the reference current and generates the most significant bit (MSB), the second section compares the absolute value of the remainder formed by the input current minus 1/2 of the reference current with 1/4 of the reference current for generating the second most significant bit, and so on till the n bit digital word output is formed from the input current.
Claim 2
Dependent Claim
174 words
An analog-to-digital converter for converting an input current into an n bit digital word output n being an integer number, comprising: means for providing n number of pairs of weighted current sources and drains of 1/2, 1/4, 1/8, . . . 1/2 n amplitudes of that of a reference current, I r , n diode bridge circuits connected in a concentric series arrangement, n comparators coupled to corresponding bridging arms of said n bridge circuits, wherein said current sources and drains, said bridge circuits and comparators, are operatively coupled into n sections in series to steer the currents therethrough so that the first section compares the amplitude of the input current with 1/2 of the reference current and generates the most significant bit (MSB), the second section compares the absolute value of the remainder formed by the input current minus 1/2 of the reference current with 1/4 of the reference current for generating the second most significant bit, and so on till the n bit digital word output is formed from the input current.
Claim 3
Dependent Claim
23 words
The converter according to claim 1, wherein said comparators are so connected to the bridge arms as to provide grey code digital output.
Claim 4
Dependent Claim
187 words
An analog-to-digital converter for converting an input current into an n bit unipolar digital word output n being an integer number, comprising: means for providing current drains of 1/2 of a reference current, I r ; means for providing n-1 number of pairs of weighted current sources and drains of 1/4, 1/8, . . . 1/2 amplitudes of that of the reference current, I r , n-1 diode bridge circuits connected in a concentric series arrangement, n comparators coupled to bridging arms of said n-1 bridge circuits, wherein said current sources and drains, said bridge circuits and comparators, are operatively coupled into n sections in series to steer the currents therethrough so that the first section compares the amplitude of the input current with the 1/2 of the reference current and generates the most significant bit (MSB), the second section compares the absolute value of the remainder formed by the input current minus 1/2 of the reference current with 1/4 of the reference current for generating the second most significant bit, and so on till the n bit digital word output is formed from the input current.
Claim 5
Dependent Claim
187 words
An analog-to-digital converter for converting an input current into an n bit unipolar digital word output n being an integer number, comprising: means for providing current drains of 1/2 of a reference current, I r ; means for providing n-1 number of pairs of weighted current sources and drains of 1/4, 1/8, . . . 1/2 amplitudes of that of the reference current, I r , n-1 diode bridge circuits connected in a concentric series arrangement, n comparators coupled to bridging arms of said n-1 bridge circuits, wherein said current sources and drains, said bridge circuits and comparators, are operatively coupled into n sections in series to steer the currents therethrough so that the first section compares the amplitude of the input current with the 1/2 of the reference current and generates the most significant bit (MSB), the second section compares the absolute value of the remainder formed by the input current minus 1/2 of the reference current with 1/4 of the reference current for generating the second most significant bit, and so on till the n bit digital word output is formed from the input current.
Claim 6
Dependent Claim
16 words
The converter according to claim 3, wherein said converter is adapted to provide a bipolar conversion.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1979-10-05 | 1980-04-05 | 1980-10-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1983-10-05 | 1984-04-05 | 1984-10-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1987-10-05 | 1988-04-05 | 1988-10-05 | $7700.00 | Window Closed / Lapsed |