Analog to digital converter using a drift transistor

Claim 2

A combination for converting a variable amplitude analog signal to a digital signal comprised of a transistor having a single emitter contact, dual base contacts and a plurality of collector contacts, means for impressing said variable amplitude analog signal on said dual base contacts to establish a drift electric field, means for injecting a pulse of charged carriers on said emitter contact, and means for detecting the spatial position of said pulse of charged carriers a fixed time interval after injection of said pulse of charged carriers on at least one of said collector contacts with said detected spatial position being proportional to said drift electric field to provide a digitally encoded signal indicative of said variable amplitude analog signal.

Claim 3

The combination in accordance with claim 1 wherein The means for impressing the analog signal on the dual base contacts comprises first and second base region contacts equidistant from said single emitter contact, metallized layers deposited on the exterior surface of said base region contacts, and first and second electric circuits connecting said analog signal differentially to said metallized layers of said base region contacts.

Claim 4

The combination in accordance with claim 1 wherein the means for injecting a pulse of charged carriers on the emitter contact comprises a unitary emitter region, a metallized layer deposited on the exterior surface of said emitter region contact, means for generating a pulse of minority carriers, and means for connecting said minority carrier pulse generating means to said metallized layer of said emitter region contact.

Claim 5

The combination in accordance with claim 3 wherein the means for generating a pulse of minority carriers comprises a voltage source having an output which periodically steps between a reference ground potential and a predetermined voltage, and a resistive impedance in series connection with said voltage source and said connecting means.

Claim 6

The combination in accordance with claim 1 wherein the means for detecting the pulse of charged carriers comprises a plurality of current detecting means, means for connecting said current detecting means to said collector contacts, and means for periodically activating said current detecting means.

Claim 7

The combination in accordance with claim 5 wherein each of the current detecting means comprises means for periodically generating a sampling bias current, a common ground reference, and a diode bridge rectifier circuit in the bidirectional current path of at least one of said collectors with the diodes poled for forward conduction of said bias current as it flows between said generating means and said common ground reference.

Claim 8

The combination in accordance with claim 5 in which said plurality of collector region contacts of said transistor inclues interconnection means for coupling equal areas of said collector region contacts to each of said current detecting means.

Claim 9

The combination in accordance with claim 7 in which the interconnection means comprises a metallized layer deposited on the exterior surface of said collector region contacts whereby said metallized layers form a binary code matrix.

Claim 10

The combination in accordance with claim 1 in which said emitter is centrally located between said dual base region contacts, and said plurality of collector contacts are located on either side of said emitter contact and between said dual base region contacts with said collector contacts being further arranged in a binary coded matrix for cooperating with said detection means to indicate the position of said pulse of charged carriers in said transistor after said fixed time interval.

Claim 11

A semiconductor transistor device for converting a variable amplitude analog signal to a multibit digital signal a word at a time comprised of first and second base region contacts, an emitter region contact centrally located between said base region contacts, and a plurality of collector contacts on either side of said emitter region contact and between said base region contacts said collector contacts being further arranged in a binary coded matrix for effecting word-at-a-time conversions, said plurality of collectors in said binary coded matrix being disposed along plural row lines of said matrix whereas said base region contacts and said emitter region contact are parallel to column lines of said matrix, with the presence or absence of collector contacts along plural column lines indicating a binary representation of distance from said emitter contact, the presence of a collector contact representing a binary one the absence of a collector contact representing a binary zero.

Claim 12

A semiconductor transistor device for converting a variable amplitude analog signal to a multibit digital signal a word at a time comprised of first and second base region contacts, an emitter region contact centrally located between said base region contacts, and a plurality of collector contacts on either side of said emitter region contact and between said base region contacts said collector contacts being further arranged in a binary coded matrix for effecting word-at-a-time conversions, said plurality of collectors in said binary coded matrix being disposed along plural row lines of said matrix whereas said base region contacts and said emitter region contact are parallel to column lines of said matrix, with the presence or absence of collector contacts along plural column lines indicating a binary representation of distance from said emitter contact, the presence of a collector contact representing a binary one the absence of a collector contact representing a binary zero.